module simple(SW, KEY, LEDG);
	/* Declare Inputs/Outputs of the module */
	input 	[1:0]	KEY;
	input	[0:0]	SW;
	output	[7:0]	LEDG;
	
	/* Declare shift register bits and local wires */
	reg		[7:0]	shift_reg_bits;
	wire 			clock, reset_n;
	
	/* Connect inputs to wires. This makes the code easier to read. */
	assign clock = KEY[0];
	assign reset_n = KEY[1];
	
	/* Code describing the behaviour of the shift register. */
	always@(posedge clock or negedge reset_n)
	begin
		if (~reset_n)
			shift_reg_bits <= 8'd0;
		else
		begin
			shift_reg_bits[7:1] <= shift_reg_bits[6:0];
			shift_reg_bits[0] <= SW[0];
		end
	end
	
	/* Assign Circuit Outputs */
	assign LEDG = shift_reg_bits;
endmodule
