/* 
 * This module is a right-left shift/rotate register
 * Inputs:
 * 	init		specifies the three msb values to be loaded when L = 1
 * 	L			active-high load control
 * 	E			active-high enable control
 * 	right		causes a right-shift (or rotate)
 * 	left	 	if !right, causes a left-shift (or rotate)
 * 	w			serial input for shift operation
 * 	rotate	rotates when 1 and shifts when 0
 * Output:
 * 	Q 			shift-register outputs
*/
module shift_rot_lr (init, L, E, clock, right, left, w, rotate, Q);

	parameter M = 10;

	input [2:0] init;
	input L, E, clock, right, left, w, rotate;
	output reg [M-1:0] Q;

	always @(posedge clock)
		if (L)
		begin
			Q[M-1:M-3] <= init;	// initialize shift register
			Q[M-4:0] <= {M-3{1'b0}};	
		end
		else if (E)
			if (right)	// right shift
			begin
				Q[M-1] <= rotate ? Q[0] : w;
				Q[M-2:0] <= Q[M-1:1];
			end
			else if (left)	// left shift
			begin
				Q[0] <= rotate ? Q[M-1] : w;
				Q[M-1:1] <= Q[M-2:0];
			end
endmodule
