Analysis & Synthesis report for chat_room
Mon Jul 20 18:38:49 2009
Quartus II Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Analysis & Synthesis Source Files Read
  5. Analysis & Synthesis Resource Usage Summary
  6. Analysis & Synthesis Resource Utilization by Entity
  7. Analysis & Synthesis RAM Summary
  8. Analysis & Synthesis DSP Block Usage Summary
  9. State Machine - |chat_room|arbiter:my_arbiter|present_state
 10. State Machine - |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize
 11. State Machine - |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize
 12. Registers Protected by Synthesis
 13. Logic Cells Representing Combinational Loops
 14. Registers Removed During Synthesis
 15. Removed Registers Triggering Further Register Optimizations
 16. General Register Statistics
 17. Inverted Register Statistics
 18. Multiplexer Restructuring Statistics (Restructuring Performed)
 19. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated
 20. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram|altsyncram_7eg1:auto_generated
 21. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram|altsyncram_44g1:auto_generated
 22. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram|altsyncram_54g1:auto_generated
 23. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 24. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 25. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_ud72:auto_generated
 26. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated
 27. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck
 28. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 29. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 30. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk
 31. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
 32. Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
 33. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated
 34. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram|altsyncram_veg1:auto_generated
 35. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram|altsyncram_s4g1:auto_generated
 36. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram|altsyncram_t4g1:auto_generated
 37. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 38. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
 39. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_me72:auto_generated
 40. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated
 41. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck
 42. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 43. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 44. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk
 45. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
 46. Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
 47. Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one
 48. Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 49. Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 50. Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic
 51. Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two
 52. Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 53. Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
 54. Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic
 55. Source assignments for dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram|altsyncram_lvb1:auto_generated
 56. Source assignments for dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram|altsyncram_d0c1:auto_generated
 57. Source assignments for dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch
 58. Source assignments for pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst
 59. Source assignments for pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|MDCK2395:\cycloneii_WCRO7487_gen_0:cycloneii_WCRO7487_gen_1
 60. Source assignments for sld_hub:sld_hub_inst
 61. Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:hub_info_reg
 62. Parameter Settings for User Entity Instance: dual_processor_system:my_system|bridge_one:the_bridge_one
 63. Parameter Settings for User Entity Instance: dual_processor_system:my_system|bridge_two:the_bridge_two
 64. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data
 65. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram
 66. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag
 67. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram
 68. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a
 69. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram
 70. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b
 71. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram
 72. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1
 73. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2
 74. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component
 75. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 76. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component
 77. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 78. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 79. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 80. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
 81. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
 82. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy
 83. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data
 84. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram
 85. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag
 86. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram
 87. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a
 88. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram
 89. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b
 90. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram
 91. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1
 92. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2
 93. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component
 94. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 95. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component
 96. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram
 97. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer
 98. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1
 99. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2
100. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3
101. Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy
102. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo
103. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo
104. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic
105. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo
106. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo
107. Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic
108. Parameter Settings for User Entity Instance: dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram
109. Parameter Settings for User Entity Instance: dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram
110. Parameter Settings for User Entity Instance: arbiter:my_arbiter
111. Parameter Settings for Inferred Entity Instance: pzdyqx:nabboc
112. Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst
113. altsyncram Parameter Settings by Entity Instance
114. altmult_add Parameter Settings by Entity Instance
115. scfifo Parameter Settings by Entity Instance
116. Port Connectivity Checks: "dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch"
117. Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic"
118. Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_two_avalon_jtag_slave_arbitrator:the_jtag_uart_two_avalon_jtag_slave"
119. Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic"
120. Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_one_avalon_jtag_slave_arbitrator:the_jtag_uart_one_avalon_jtag_slave"
121. Analysis & Synthesis Messages
122. Analysis & Synthesis Suppressed Messages



----------------
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----------------
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Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                      ;
+------------------------------------+----------------------------------------------+
; Analysis & Synthesis Status        ; Successful - Mon Jul 20 18:38:49 2009        ;
; Quartus II Version                 ; 9.0 Build 235 06/17/2009 SP 2 SJ Web Edition ;
; Revision Name                      ; chat_room                                    ;
; Top-level Entity Name              ; chat_room                                    ;
; Family                             ; Cyclone II                                   ;
; Total logic elements               ; 5,314                                        ;
;     Total combinational functions  ; 4,794                                        ;
;     Dedicated logic registers      ; 2,886                                        ;
; Total registers                    ; 2886                                         ;
; Total pins                         ; 41                                           ;
; Total virtual pins                 ; 0                                            ;
; Total memory bits                  ; 157,696                                      ;
; Embedded Multiplier 9-bit elements ; 8                                            ;
; Total PLLs                         ; 0                                            ;
+------------------------------------+----------------------------------------------+


+--------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                          ;
+--------------------------------------------------------------+--------------------+--------------------+
; Option                                                       ; Setting            ; Default Value      ;
+--------------------------------------------------------------+--------------------+--------------------+
; Device                                                       ; EP2C20F484C7       ;                    ;
; Top-level entity name                                        ; chat_room          ; chat_room          ;
; Family name                                                  ; Cyclone II         ; Stratix II         ;
; Optimization Technique                                       ; Speed              ; Balanced           ;
; Use Generated Physical Constraints File                      ; Off                ;                    ;
; Use smart compilation                                        ; Off                ; Off                ;
; Restructure Multiplexers                                     ; Auto               ; Auto               ;
; Create Debugging Nodes for IP Cores                          ; Off                ; Off                ;
; Preserve fewer node names                                    ; On                 ; On                 ;
; Disable OpenCore Plus hardware evaluation                    ; Off                ; Off                ;
; Verilog Version                                              ; Verilog_2001       ; Verilog_2001       ;
; VHDL Version                                                 ; VHDL93             ; VHDL93             ;
; State Machine Processing                                     ; Auto               ; Auto               ;
; Safe State Machine                                           ; Off                ; Off                ;
; Extract Verilog State Machines                               ; On                 ; On                 ;
; Extract VHDL State Machines                                  ; On                 ; On                 ;
; Ignore Verilog initial constructs                            ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                   ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops               ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                      ; On                 ; On                 ;
; Parallel Synthesis                                           ; Off                ; Off                ;
; DSP Block Balancing                                          ; Auto               ; Auto               ;
; NOT Gate Push-Back                                           ; On                 ; On                 ;
; Power-Up Don't Care                                          ; On                 ; On                 ;
; Remove Redundant Logic Cells                                 ; Off                ; Off                ;
; Remove Duplicate Registers                                   ; On                 ; On                 ;
; Ignore CARRY Buffers                                         ; Off                ; Off                ;
; Ignore CASCADE Buffers                                       ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                        ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                    ; Off                ; Off                ;
; Ignore LCELL Buffers                                         ; Off                ; Off                ;
; Ignore SOFT Buffers                                          ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                               ; Off                ; Off                ;
; Carry Chain Length                                           ; 70                 ; 70                 ;
; Auto Carry Chains                                            ; On                 ; On                 ;
; Auto Open-Drain Pins                                         ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                        ; Off                ; Off                ;
; Auto ROM Replacement                                         ; On                 ; On                 ;
; Auto RAM Replacement                                         ; On                 ; On                 ;
; Auto Shift Register Replacement                              ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                ; On                 ; On                 ;
; Strict RAM Replacement                                       ; Off                ; Off                ;
; Allow Synchronous Control Signals                            ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                       ; Off                ; Off                ;
; Auto RAM to Logic Cell Conversion                            ; Off                ; Off                ;
; Auto Resource Sharing                                        ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                           ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                           ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing          ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives            ; Off                ; Off                ;
; Timing-Driven Synthesis                                      ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report           ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                           ; Off                ; Off                ;
; Synchronization Register Chain Length                        ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                 ; Normal compilation ; Normal compilation ;
; HDL message level                                            ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages              ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report     ; 100                ; 100                ;
; Number of Inverted Registers Reported in Synthesis Report    ; 100                ; 100                ;
; Clock MUX Protection                                         ; On                 ; On                 ;
; Auto Gated Clock Conversion                                  ; Off                ; Off                ;
; Block Design Naming                                          ; Auto               ; Auto               ;
; SDC constraint protection                                    ; Off                ; Off                ;
; Synthesis Effort                                             ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal ; On                 ; On                 ;
; Analysis & Synthesis Message Level                           ; Medium             ; Medium             ;
+--------------------------------------------------------------+--------------------+--------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                         ;
+-------------------------------------+-----------------+----------------------------------------+-------------------------------------------------------------------------------+
; File Name with User-Entered Path    ; Used in Netlist ; File Type                              ; File Name with Absolute Path                                                  ;
+-------------------------------------+-----------------+----------------------------------------+-------------------------------------------------------------------------------+
; sram.v                              ; yes             ; User Verilog HDL File                  ; D:/Course/Computer Organization/chat_room/sram.v                              ;
; bridge_one.v                        ; yes             ; User Verilog HDL File                  ; D:/Course/Computer Organization/chat_room/bridge_one.v                        ;
; bridge_two.v                        ; yes             ; User Verilog HDL File                  ; D:/Course/Computer Organization/chat_room/bridge_two.v                        ;
; chat_room.v                         ; yes             ; User Verilog HDL File                  ; D:/Course/Computer Organization/chat_room/chat_room.v                         ;
; arbiter.v                           ; yes             ; User Verilog HDL File                  ; D:/Course/Computer Organization/chat_room/arbiter.v                           ;
; dual_processor_system.v             ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/dual_processor_system.v             ;
; cpu_one.v                           ; yes             ; Encrypted Altera IP File               ; D:/Course/Computer Organization/chat_room/cpu_one.v                           ;
; cpu_one_test_bench.v                ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_test_bench.v                ;
; altsyncram.tdf                      ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altsyncram.tdf                   ;
; stratix_ram_block.inc               ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/stratix_ram_block.inc            ;
; lpm_mux.inc                         ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/lpm_mux.inc                      ;
; lpm_decode.inc                      ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/lpm_decode.inc                   ;
; aglobal90.inc                       ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/aglobal90.inc                    ;
; a_rdenreg.inc                       ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_rdenreg.inc                    ;
; altrom.inc                          ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altrom.inc                       ;
; altram.inc                          ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altram.inc                       ;
; altdpram.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altdpram.inc                     ;
; altqpram.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altqpram.inc                     ;
; db/altsyncram_qed1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_qed1.tdf              ;
; db/altsyncram_7eg1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_7eg1.tdf              ;
; db/altsyncram_44g1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_44g1.tdf              ;
; db/altsyncram_54g1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_54g1.tdf              ;
; cpu_one_mult_cell.v                 ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_mult_cell.v                 ;
; altmult_add.tdf                     ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altmult_add.tdf                  ;
; stratix_mac_mult.inc                ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/stratix_mac_mult.inc             ;
; stratix_mac_out.inc                 ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/stratix_mac_out.inc              ;
; db/mult_add_4cr2.tdf                ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/mult_add_4cr2.tdf                ;
; db/ded_mult_2o81.tdf                ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/ded_mult_2o81.tdf                ;
; db/dffpipe_93c.tdf                  ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/dffpipe_93c.tdf                  ;
; db/mult_add_6cr2.tdf                ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/mult_add_6cr2.tdf                ;
; db/altsyncram_ud72.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_ud72.tdf              ;
; cpu_one_ociram_default_contents.mif ; yes             ; Auto-Found Memory Initialization File  ; D:/Course/Computer Organization/chat_room/cpu_one_ociram_default_contents.mif ;
; cpu_one_oci_test_bench.v            ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_oci_test_bench.v            ;
; db/altsyncram_e502.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_e502.tdf              ;
; cpu_one_jtag_debug_module_wrapper.v ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_jtag_debug_module_wrapper.v ;
; cpu_one_jtag_debug_module_tck.v     ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_jtag_debug_module_tck.v     ;
; altera_std_synchronizer.v           ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/altera_std_synchronizer.v        ;
; cpu_one_jtag_debug_module_sysclk.v  ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_one_jtag_debug_module_sysclk.v  ;
; sld_virtual_jtag_basic.v            ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/sld_virtual_jtag_basic.v         ;
; cpu_two.v                           ; yes             ; Encrypted Altera IP File               ; D:/Course/Computer Organization/chat_room/cpu_two.v                           ;
; cpu_two_test_bench.v                ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_test_bench.v                ;
; db/altsyncram_veg1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_veg1.tdf              ;
; db/altsyncram_s4g1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_s4g1.tdf              ;
; db/altsyncram_t4g1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_t4g1.tdf              ;
; cpu_two_mult_cell.v                 ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_mult_cell.v                 ;
; db/altsyncram_me72.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_me72.tdf              ;
; cpu_two_ociram_default_contents.mif ; yes             ; Auto-Found Memory Initialization File  ; D:/Course/Computer Organization/chat_room/cpu_two_ociram_default_contents.mif ;
; cpu_two_oci_test_bench.v            ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_oci_test_bench.v            ;
; cpu_two_jtag_debug_module_wrapper.v ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_jtag_debug_module_wrapper.v ;
; cpu_two_jtag_debug_module_tck.v     ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_jtag_debug_module_tck.v     ;
; cpu_two_jtag_debug_module_sysclk.v  ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/cpu_two_jtag_debug_module_sysclk.v  ;
; jtag_uart_one.v                     ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/jtag_uart_one.v                     ;
; scfifo.tdf                          ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/scfifo.tdf                       ;
; a_regfifo.inc                       ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_regfifo.inc                    ;
; a_dpfifo.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_dpfifo.inc                     ;
; a_i2fifo.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_i2fifo.inc                     ;
; a_fffifo.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_fffifo.inc                     ;
; a_f2fifo.inc                        ; yes             ; Megafunction                           ; c:/altera/90/quartus/libraries/megafunctions/a_f2fifo.inc                     ;
; db/scfifo_5n21.tdf                  ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/scfifo_5n21.tdf                  ;
; db/a_dpfifo_8t21.tdf                ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/a_dpfifo_8t21.tdf                ;
; db/a_fefifo_7cf.tdf                 ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/a_fefifo_7cf.tdf                 ;
; db/cntr_rj7.tdf                     ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/cntr_rj7.tdf                     ;
; db/dpram_5h21.tdf                   ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/dpram_5h21.tdf                   ;
; db/altsyncram_9tl1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_9tl1.tdf              ;
; db/cntr_fjb.tdf                     ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/cntr_fjb.tdf                     ;
; alt_jtag_atlantic.v                 ; yes             ; Encrypted Megafunction                 ; c:/altera/90/quartus/libraries/megafunctions/alt_jtag_atlantic.v              ;
; jtag_uart_two.v                     ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/jtag_uart_two.v                     ;
; onchip_mem_one.v                    ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/onchip_mem_one.v                    ;
; db/altsyncram_lvb1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_lvb1.tdf              ;
; onchip_mem_two.v                    ; yes             ; Auto-Found Verilog HDL File            ; D:/Course/Computer Organization/chat_room/onchip_mem_two.v                    ;
; db/altsyncram_d0c1.tdf              ; yes             ; Auto-Generated Megafunction            ; D:/Course/Computer Organization/chat_room/db/altsyncram_d0c1.tdf              ;
; pzdyqx.vhd                          ; yes             ; Encrypted Megafunction                 ; c:/altera/90/quartus/libraries/megafunctions/pzdyqx.vhd                       ;
; sld_hub.vhd                         ; yes             ; Encrypted Megafunction                 ; c:/altera/90/quartus/libraries/megafunctions/sld_hub.vhd                      ;
; sld_rom_sr.vhd                      ; yes             ; Encrypted Megafunction                 ; c:/altera/90/quartus/libraries/megafunctions/sld_rom_sr.vhd                   ;
+-------------------------------------+-----------------+----------------------------------------+-------------------------------------------------------------------------------+


+--------------------------------------------------------+
; Analysis & Synthesis Resource Usage Summary            ;
+---------------------------------------------+----------+
; Resource                                    ; Usage    ;
+---------------------------------------------+----------+
; Estimated Total logic elements              ; 5,314    ;
;                                             ;          ;
; Total combinational functions               ; 4794     ;
; Logic element usage by number of LUT inputs ;          ;
;     -- 4 input functions                    ; 2328     ;
;     -- 3 input functions                    ; 1709     ;
;     -- <=2 input functions                  ; 757      ;
;                                             ;          ;
; Logic elements by mode                      ;          ;
;     -- normal mode                          ; 4309     ;
;     -- arithmetic mode                      ; 485      ;
;                                             ;          ;
; Total registers                             ; 2886     ;
;     -- Dedicated logic registers            ; 2886     ;
;     -- I/O registers                        ; 0        ;
;                                             ;          ;
; I/O pins                                    ; 41       ;
; Total memory bits                           ; 157696   ;
; Embedded Multiplier 9-bit elements          ; 8        ;
; Maximum fan-out node                        ; CLOCK_50 ;
; Maximum fan-out                             ; 2914     ;
; Total fan-out                               ; 33840    ;
; Average fan-out                             ; 4.17     ;
+---------------------------------------------+----------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                                                                                                                             ;
+----------------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                                                               ; LC Combinationals ; LC Registers ; Memory Bits ; DSP Elements ; DSP 9x9 ; DSP 18x18 ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                                                                                                                                       ; Library Name ;
+----------------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |chat_room                                                                                               ; 4794 (19)         ; 2886 (32)    ; 157696      ; 8            ; 0       ; 4         ; 41   ; 0            ; |chat_room                                                                                                                                                                                                                                                                                                ; work         ;
;    |arbiter:my_arbiter|                                                                                  ; 9 (9)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|arbiter:my_arbiter                                                                                                                                                                                                                                                                             ; work         ;
;    |dual_processor_system:my_system|                                                                     ; 4352 (1)          ; 2637 (0)     ; 157696      ; 8            ; 0       ; 4         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system                                                                                                                                                                                                                                                                ; work         ;
;       |bridge_one:the_bridge_one|                                                                        ; 102 (102)         ; 95 (95)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|bridge_one:the_bridge_one                                                                                                                                                                                                                                      ; work         ;
;       |bridge_one_avalon_slave_arbitrator:the_bridge_one_avalon_slave|                                   ; 6 (6)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|bridge_one_avalon_slave_arbitrator:the_bridge_one_avalon_slave                                                                                                                                                                                                 ; work         ;
;       |bridge_two:the_bridge_two|                                                                        ; 70 (70)           ; 95 (95)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|bridge_two:the_bridge_two                                                                                                                                                                                                                                      ; work         ;
;       |bridge_two_avalon_slave_arbitrator:the_bridge_two_avalon_slave|                                   ; 6 (6)             ; 1 (1)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|bridge_two_avalon_slave_arbitrator:the_bridge_two_avalon_slave                                                                                                                                                                                                 ; work         ;
;       |cpu_one:the_cpu_one|                                                                              ; 1659 (1374)       ; 1083 (899)   ; 45056       ; 4            ; 0       ; 2         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one                                                                                                                                                                                                                                            ; work         ;
;          |cpu_one_ic_data_module:cpu_one_ic_data|                                                        ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data                                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram                                                                                                                                                                           ; work         ;
;                |altsyncram_qed1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated                                                                                                                                            ; work         ;
;          |cpu_one_ic_tag_module:cpu_one_ic_tag|                                                          ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag                                                                                                                                                                                                       ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram                                                                                                                                                                             ; work         ;
;                |altsyncram_7eg1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram|altsyncram_7eg1:auto_generated                                                                                                                                              ; work         ;
;          |cpu_one_mult_cell:the_cpu_one_mult_cell|                                                       ; 0 (0)             ; 0 (0)        ; 0           ; 4            ; 0       ; 2         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell                                                                                                                                                                                                    ; work         ;
;             |altmult_add:the_altmult_add_part_1|                                                         ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1                                                                                                                                                                 ; work         ;
;                |mult_add_4cr2:auto_generated|                                                            ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated                                                                                                                                    ; work         ;
;                   |ded_mult_2o81:ded_mult1|                                                              ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1                                                                                                            ; work         ;
;             |altmult_add:the_altmult_add_part_2|                                                         ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2                                                                                                                                                                 ; work         ;
;                |mult_add_6cr2:auto_generated|                                                            ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated                                                                                                                                    ; work         ;
;                   |ded_mult_2o81:ded_mult1|                                                              ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1                                                                                                            ; work         ;
;          |cpu_one_nios2_oci:the_cpu_one_nios2_oci|                                                       ; 252 (37)          ; 184 (0)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci                                                                                                                                                                                                    ; work         ;
;             |cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|                    ; 107 (0)           ; 96 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper                                                                                                                            ; work         ;
;                |cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|                   ; 7 (7)             ; 49 (45)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk                                                      ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer2|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer3|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ; work         ;
;                |cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|                         ; 96 (96)           ; 47 (43)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck                                                            ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer1|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1       ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer|                                  ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer        ; work         ;
;                |sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy|                                    ; 4 (4)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy                                                                       ; work         ;
;             |cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|                                      ; 9 (9)             ; 5 (5)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg                                                                                                                                              ; work         ;
;             |cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|                                        ; 32 (32)           ; 32 (32)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break                                                                                                                                                ; work         ;
;             |cpu_one_nios2_oci_debug:the_cpu_one_nios2_oci_debug|                                        ; 11 (11)           ; 7 (7)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_debug:the_cpu_one_nios2_oci_debug                                                                                                                                                ; work         ;
;             |cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|                                              ; 56 (56)           ; 44 (44)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem                                                                                                                                                      ; work         ;
;                |cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|      ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component                                                                   ; work         ;
;                   |altsyncram:the_altsyncram|                                                            ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram                                         ; work         ;
;                      |altsyncram_ud72:auto_generated|                                                    ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_ud72:auto_generated          ; work         ;
;          |cpu_one_register_bank_a_module:cpu_one_register_bank_a|                                        ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram                                                                                                                                                           ; work         ;
;                |altsyncram_44g1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram|altsyncram_44g1:auto_generated                                                                                                                            ; work         ;
;          |cpu_one_register_bank_b_module:cpu_one_register_bank_b|                                        ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram                                                                                                                                                           ; work         ;
;                |altsyncram_54g1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram|altsyncram_54g1:auto_generated                                                                                                                            ; work         ;
;          |cpu_one_test_bench:the_cpu_one_test_bench|                                                     ; 33 (33)           ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_test_bench:the_cpu_one_test_bench                                                                                                                                                                                                  ; work         ;
;       |cpu_one_data_master_arbitrator:the_cpu_one_data_master|                                           ; 142 (142)         ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one_data_master_arbitrator:the_cpu_one_data_master                                                                                                                                                                                                         ; work         ;
;       |cpu_one_instruction_master_arbitrator:the_cpu_one_instruction_master|                             ; 68 (68)           ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one_instruction_master_arbitrator:the_cpu_one_instruction_master                                                                                                                                                                                           ; work         ;
;       |cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|                               ; 29 (29)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module                                                                                                                                                                                             ; work         ;
;       |cpu_two:the_cpu_two|                                                                              ; 1658 (1373)       ; 1082 (898)   ; 45056       ; 4            ; 0       ; 2         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two                                                                                                                                                                                                                                            ; work         ;
;          |cpu_two_ic_data_module:cpu_two_ic_data|                                                        ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data                                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram                                                                                                                                                                           ; work         ;
;                |altsyncram_qed1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated                                                                                                                                            ; work         ;
;          |cpu_two_ic_tag_module:cpu_two_ic_tag|                                                          ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag                                                                                                                                                                                                       ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram                                                                                                                                                                             ; work         ;
;                |altsyncram_veg1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 2048        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram|altsyncram_veg1:auto_generated                                                                                                                                              ; work         ;
;          |cpu_two_mult_cell:the_cpu_two_mult_cell|                                                       ; 0 (0)             ; 0 (0)        ; 0           ; 4            ; 0       ; 2         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell                                                                                                                                                                                                    ; work         ;
;             |altmult_add:the_altmult_add_part_1|                                                         ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1                                                                                                                                                                 ; work         ;
;                |mult_add_4cr2:auto_generated|                                                            ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated                                                                                                                                    ; work         ;
;                   |ded_mult_2o81:ded_mult1|                                                              ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1                                                                                                            ; work         ;
;             |altmult_add:the_altmult_add_part_2|                                                         ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2                                                                                                                                                                 ; work         ;
;                |mult_add_6cr2:auto_generated|                                                            ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated                                                                                                                                    ; work         ;
;                   |ded_mult_2o81:ded_mult1|                                                              ; 0 (0)             ; 0 (0)        ; 0           ; 2            ; 0       ; 1         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1                                                                                                            ; work         ;
;          |cpu_two_nios2_oci:the_cpu_two_nios2_oci|                                                       ; 252 (37)          ; 184 (0)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci                                                                                                                                                                                                    ; work         ;
;             |cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|                    ; 107 (0)           ; 96 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper                                                                                                                            ; work         ;
;                |cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|                   ; 7 (7)             ; 49 (45)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk                                                      ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer2|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer3|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ; work         ;
;                |cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|                         ; 96 (96)           ; 47 (43)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck                                                            ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer1|                                 ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1       ; work         ;
;                   |altera_std_synchronizer:the_altera_std_synchronizer|                                  ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer        ; work         ;
;                |sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy|                                    ; 4 (4)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy                                                                       ; work         ;
;             |cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|                                      ; 9 (9)             ; 5 (5)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg                                                                                                                                              ; work         ;
;             |cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|                                        ; 32 (32)           ; 32 (32)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break                                                                                                                                                ; work         ;
;             |cpu_two_nios2_oci_debug:the_cpu_two_nios2_oci_debug|                                        ; 11 (11)           ; 7 (7)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_debug:the_cpu_two_nios2_oci_debug                                                                                                                                                ; work         ;
;             |cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|                                              ; 56 (56)           ; 44 (44)      ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem                                                                                                                                                      ; work         ;
;                |cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|      ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component                                                                   ; work         ;
;                   |altsyncram:the_altsyncram|                                                            ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram                                         ; work         ;
;                      |altsyncram_me72:auto_generated|                                                    ; 0 (0)             ; 0 (0)        ; 8192        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_me72:auto_generated          ; work         ;
;          |cpu_two_register_bank_a_module:cpu_two_register_bank_a|                                        ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram                                                                                                                                                           ; work         ;
;                |altsyncram_s4g1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram|altsyncram_s4g1:auto_generated                                                                                                                            ; work         ;
;          |cpu_two_register_bank_b_module:cpu_two_register_bank_b|                                        ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b                                                                                                                                                                                     ; work         ;
;             |altsyncram:the_altsyncram|                                                                  ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram                                                                                                                                                           ; work         ;
;                |altsyncram_t4g1:auto_generated|                                                          ; 0 (0)             ; 0 (0)        ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram|altsyncram_t4g1:auto_generated                                                                                                                            ; work         ;
;          |cpu_two_test_bench:the_cpu_two_test_bench|                                                     ; 33 (33)           ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_test_bench:the_cpu_two_test_bench                                                                                                                                                                                                  ; work         ;
;       |cpu_two_data_master_arbitrator:the_cpu_two_data_master|                                           ; 142 (142)         ; 24 (24)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two_data_master_arbitrator:the_cpu_two_data_master                                                                                                                                                                                                         ; work         ;
;       |cpu_two_instruction_master_arbitrator:the_cpu_two_instruction_master|                             ; 68 (68)           ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two_instruction_master_arbitrator:the_cpu_two_instruction_master                                                                                                                                                                                           ; work         ;
;       |cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|                               ; 28 (28)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module                                                                                                                                                                                             ; work         ;
;       |dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch| ; 0 (0)             ; 2 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch                                                                                                                                                               ; work         ;
;       |jtag_uart_one:the_jtag_uart_one|                                                                  ; 157 (50)          ; 108 (13)     ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one                                                                                                                                                                                                                                ; work         ;
;          |alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|                                             ; 56 (56)           ; 55 (55)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic                                                                                                                                                                              ; work         ;
;          |jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|                                             ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r                                                                                                                                                                              ; work         ;
;             |scfifo:rfifo|                                                                               ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo                                                                                                                                                                 ; work         ;
;                |scfifo_5n21:auto_generated|                                                              ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated                                                                                                                                      ; work         ;
;                   |a_dpfifo_8t21:dpfifo|                                                                 ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo                                                                                                                 ; work         ;
;                      |a_fefifo_7cf:fifo_state|                                                           ; 14 (8)            ; 8 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state                                                                                         ; work         ;
;                         |cntr_rj7:count_usedw|                                                           ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|cntr_rj7:count_usedw                                                                    ; work         ;
;                      |cntr_fjb:rd_ptr_count|                                                             ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:rd_ptr_count                                                                                           ; work         ;
;                      |cntr_fjb:wr_ptr|                                                                   ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:wr_ptr                                                                                                 ; work         ;
;                      |dpram_5h21:FIFOram|                                                                ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram                                                                                              ; work         ;
;                         |altsyncram_9tl1:altsyncram2|                                                    ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2                                                                  ; work         ;
;          |jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|                                             ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w                                                                                                                                                                              ; work         ;
;             |scfifo:wfifo|                                                                               ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo                                                                                                                                                                 ; work         ;
;                |scfifo_5n21:auto_generated|                                                              ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated                                                                                                                                      ; work         ;
;                   |a_dpfifo_8t21:dpfifo|                                                                 ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo                                                                                                                 ; work         ;
;                      |a_fefifo_7cf:fifo_state|                                                           ; 13 (7)            ; 8 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state                                                                                         ; work         ;
;                         |cntr_rj7:count_usedw|                                                           ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|cntr_rj7:count_usedw                                                                    ; work         ;
;                      |cntr_fjb:rd_ptr_count|                                                             ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:rd_ptr_count                                                                                           ; work         ;
;                      |cntr_fjb:wr_ptr|                                                                   ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:wr_ptr                                                                                                 ; work         ;
;                      |dpram_5h21:FIFOram|                                                                ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram                                                                                              ; work         ;
;                         |altsyncram_9tl1:altsyncram2|                                                    ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2                                                                  ; work         ;
;       |jtag_uart_one_avalon_jtag_slave_arbitrator:the_jtag_uart_one_avalon_jtag_slave|                   ; 5 (5)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_one_avalon_jtag_slave_arbitrator:the_jtag_uart_one_avalon_jtag_slave                                                                                                                                                                                 ; work         ;
;       |jtag_uart_two:the_jtag_uart_two|                                                                  ; 157 (50)          ; 106 (13)     ; 1024        ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two                                                                                                                                                                                                                                ; work         ;
;          |alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|                                             ; 56 (56)           ; 53 (53)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic                                                                                                                                                                              ; work         ;
;          |jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|                                             ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r                                                                                                                                                                              ; work         ;
;             |scfifo:rfifo|                                                                               ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo                                                                                                                                                                 ; work         ;
;                |scfifo_5n21:auto_generated|                                                              ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated                                                                                                                                      ; work         ;
;                   |a_dpfifo_8t21:dpfifo|                                                                 ; 26 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo                                                                                                                 ; work         ;
;                      |a_fefifo_7cf:fifo_state|                                                           ; 14 (8)            ; 8 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state                                                                                         ; work         ;
;                         |cntr_rj7:count_usedw|                                                           ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|cntr_rj7:count_usedw                                                                    ; work         ;
;                      |cntr_fjb:rd_ptr_count|                                                             ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:rd_ptr_count                                                                                           ; work         ;
;                      |cntr_fjb:wr_ptr|                                                                   ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:wr_ptr                                                                                                 ; work         ;
;                      |dpram_5h21:FIFOram|                                                                ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram                                                                                              ; work         ;
;                         |altsyncram_9tl1:altsyncram2|                                                    ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2                                                                  ; work         ;
;          |jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|                                             ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w                                                                                                                                                                              ; work         ;
;             |scfifo:wfifo|                                                                               ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo                                                                                                                                                                 ; work         ;
;                |scfifo_5n21:auto_generated|                                                              ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated                                                                                                                                      ; work         ;
;                   |a_dpfifo_8t21:dpfifo|                                                                 ; 25 (0)            ; 20 (0)       ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo                                                                                                                 ; work         ;
;                      |a_fefifo_7cf:fifo_state|                                                           ; 13 (7)            ; 8 (2)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state                                                                                         ; work         ;
;                         |cntr_rj7:count_usedw|                                                           ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|cntr_rj7:count_usedw                                                                    ; work         ;
;                      |cntr_fjb:rd_ptr_count|                                                             ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:rd_ptr_count                                                                                           ; work         ;
;                      |cntr_fjb:wr_ptr|                                                                   ; 6 (6)             ; 6 (6)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:wr_ptr                                                                                                 ; work         ;
;                      |dpram_5h21:FIFOram|                                                                ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram                                                                                              ; work         ;
;                         |altsyncram_9tl1:altsyncram2|                                                    ; 0 (0)             ; 0 (0)        ; 512         ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2                                                                  ; work         ;
;       |jtag_uart_two_avalon_jtag_slave_arbitrator:the_jtag_uart_two_avalon_jtag_slave|                   ; 5 (5)             ; 0 (0)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|jtag_uart_two_avalon_jtag_slave_arbitrator:the_jtag_uart_two_avalon_jtag_slave                                                                                                                                                                                 ; work         ;
;       |onchip_mem_one:the_onchip_mem_one|                                                                ; 1 (1)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one                                                                                                                                                                                                                              ; work         ;
;          |altsyncram:the_altsyncram|                                                                     ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram                                                                                                                                                                                                    ; work         ;
;             |altsyncram_lvb1:auto_generated|                                                             ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram|altsyncram_lvb1:auto_generated                                                                                                                                                                     ; work         ;
;       |onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|                                               ; 23 (23)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1                                                                                                                                                                                                             ; work         ;
;       |onchip_mem_two:the_onchip_mem_two|                                                                ; 1 (1)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two                                                                                                                                                                                                                              ; work         ;
;          |altsyncram:the_altsyncram|                                                                     ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram                                                                                                                                                                                                    ; work         ;
;             |altsyncram_d0c1:auto_generated|                                                             ; 0 (0)             ; 0 (0)        ; 32768       ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram|altsyncram_d0c1:auto_generated                                                                                                                                                                     ; work         ;
;       |onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|                                               ; 24 (24)           ; 3 (3)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1                                                                                                                                                                                                             ; work         ;
;    |pzdyqx:nabboc|                                                                                       ; 116 (0)           ; 72 (0)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc                                                                                                                                                                                                                                                                                  ; work         ;
;       |pzdyqx_impl:pzdyqx_impl_inst|                                                                     ; 116 (9)           ; 72 (9)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst                                                                                                                                                                                                                                                     ; work         ;
;          |CJQJ5354:TWMW7206|                                                                             ; 22 (22)           ; 13 (13)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|CJQJ5354:TWMW7206                                                                                                                                                                                                                                   ; work         ;
;          |MDCK2395:\cycloneii_WCRO7487_gen_0:cycloneii_WCRO7487_gen_1|                                   ; 53 (22)           ; 28 (8)       ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|MDCK2395:\cycloneii_WCRO7487_gen_0:cycloneii_WCRO7487_gen_1                                                                                                                                                                                         ; work         ;
;             |CJQJ5354:AJQA6937|                                                                          ; 31 (31)           ; 20 (20)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|MDCK2395:\cycloneii_WCRO7487_gen_0:cycloneii_WCRO7487_gen_1|CJQJ5354:AJQA6937                                                                                                                                                                       ; work         ;
;          |PZMU7345:HHRH5434|                                                                             ; 13 (13)           ; 13 (13)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|PZMU7345:HHRH5434                                                                                                                                                                                                                                   ; work         ;
;          |VELJ8121:JDCF0099|                                                                             ; 19 (19)           ; 9 (9)        ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099                                                                                                                                                                                                                                   ; work         ;
;    |sld_hub:sld_hub_inst|                                                                                ; 243 (196)         ; 122 (93)     ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|sld_hub:sld_hub_inst                                                                                                                                                                                                                                                                           ; work         ;
;       |sld_rom_sr:hub_info_reg|                                                                          ; 30 (30)           ; 10 (10)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|sld_hub:sld_hub_inst|sld_rom_sr:hub_info_reg                                                                                                                                                                                                                                                   ; work         ;
;       |sld_shadow_jsm:shadow_jsm|                                                                        ; 17 (17)           ; 19 (19)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|sld_hub:sld_hub_inst|sld_shadow_jsm:shadow_jsm                                                                                                                                                                                                                                                 ; work         ;
;    |sram:my_sram|                                                                                        ; 55 (55)           ; 17 (17)      ; 0           ; 0            ; 0       ; 0         ; 0    ; 0            ; |chat_room|sram:my_sram                                                                                                                                                                                                                                                                                   ; work         ;
+----------------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary                                                                                                                                                                                                                                                                                                                                                                                                     ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------------------------------+
; Name                                                                                                                                                                                                                                                                                             ; Type ; Mode             ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size  ; MIF                                 ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------------------------------+
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated|ALTSYNCRAM                                                                                                                                   ; AUTO ; Simple Dual Port ; 1024         ; 32           ; 1024         ; 32           ; 32768 ; None                                ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram|altsyncram_7eg1:auto_generated|ALTSYNCRAM                                                                                                                                     ; AUTO ; Simple Dual Port ; 128          ; 16           ; 128          ; 16           ; 2048  ; cpu_one_ic_tag_ram.mif              ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_ud72:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port   ; 256          ; 32           ; 256          ; 32           ; 8192  ; cpu_one_ociram_default_contents.mif ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram|altsyncram_44g1:auto_generated|ALTSYNCRAM                                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024  ; cpu_one_rf_ram_a.mif                ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram|altsyncram_54g1:auto_generated|ALTSYNCRAM                                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024  ; cpu_one_rf_ram_b.mif                ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated|ALTSYNCRAM                                                                                                                                   ; AUTO ; Simple Dual Port ; 1024         ; 32           ; 1024         ; 32           ; 32768 ; None                                ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram|altsyncram_veg1:auto_generated|ALTSYNCRAM                                                                                                                                     ; AUTO ; Simple Dual Port ; 128          ; 16           ; 128          ; 16           ; 2048  ; cpu_two_ic_tag_ram.mif              ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_me72:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port   ; 256          ; 32           ; 256          ; 32           ; 8192  ; cpu_two_ociram_default_contents.mif ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram|altsyncram_s4g1:auto_generated|ALTSYNCRAM                                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024  ; cpu_two_rf_ram_a.mif                ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram|altsyncram_t4g1:auto_generated|ALTSYNCRAM                                                                                                                   ; AUTO ; Simple Dual Port ; 32           ; 32           ; 32           ; 32           ; 1024  ; cpu_two_rf_ram_b.mif                ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2|ALTSYNCRAM                                                         ; AUTO ; Simple Dual Port ; 64           ; 8            ; 64           ; 8            ; 512   ; None                                ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2|ALTSYNCRAM                                                         ; AUTO ; Simple Dual Port ; 64           ; 8            ; 64           ; 8            ; 512   ; None                                ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2|ALTSYNCRAM                                                         ; AUTO ; Simple Dual Port ; 64           ; 8            ; 64           ; 8            ; 512   ; None                                ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2|ALTSYNCRAM                                                         ; AUTO ; Simple Dual Port ; 64           ; 8            ; 64           ; 8            ; 512   ; None                                ;
; dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram|altsyncram_lvb1:auto_generated|ALTSYNCRAM                                                                                                                                                            ; AUTO ; Single Port      ; 1024         ; 32           ; --           ; --           ; 32768 ; onchip_mem_one.hex                  ;
; dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram|altsyncram_d0c1:auto_generated|ALTSYNCRAM                                                                                                                                                            ; AUTO ; Single Port      ; 1024         ; 32           ; --           ; --           ; 32768 ; onchip_mem_two.hex                  ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+-------------------------------------+


+-----------------------------------------------------+
; Analysis & Synthesis DSP Block Usage Summary        ;
+---------------------------------------+-------------+
; Statistic                             ; Number Used ;
+---------------------------------------+-------------+
; Simple Multipliers (9-bit)            ; 0           ;
; Simple Multipliers (18-bit)           ; 4           ;
; Embedded Multiplier Blocks            ; --          ;
; Embedded Multiplier 9-bit elements    ; 8           ;
; Signed Embedded Multipliers           ; 0           ;
; Unsigned Embedded Multipliers         ; 4           ;
; Mixed Sign Embedded Multipliers       ; 0           ;
; Variable Sign Embedded Multipliers    ; 0           ;
; Dedicated Input Shift Register Chains ; 0           ;
+---------------------------------------+-------------+
Note: number of Embedded Multiplier Blocks used is only available after a successful fit.


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |chat_room|arbiter:my_arbiter|present_state                                                                                                                                                                    ;
+-----------------------------------+-----------------------------------+---------------------------+-----------------------------+-----------------------------------+---------------------------+------------------------------+
; Name                              ; present_state.s_WAIT_DEASSERT_TWO ; present_state.s_ISSUE_TWO ; present_state.s_CYCLE_DELAY ; present_state.s_WAIT_DEASSERT_ONE ; present_state.s_ISSUE_ONE ; present_state.s_WAIT_REQUEST ;
+-----------------------------------+-----------------------------------+---------------------------+-----------------------------+-----------------------------------+---------------------------+------------------------------+
; present_state.s_WAIT_REQUEST      ; 0                                 ; 0                         ; 0                           ; 0                                 ; 0                         ; 0                            ;
; present_state.s_ISSUE_ONE         ; 0                                 ; 0                         ; 0                           ; 0                                 ; 1                         ; 1                            ;
; present_state.s_WAIT_DEASSERT_ONE ; 0                                 ; 0                         ; 0                           ; 1                                 ; 0                         ; 1                            ;
; present_state.s_CYCLE_DELAY       ; 0                                 ; 0                         ; 1                           ; 0                                 ; 0                         ; 1                            ;
; present_state.s_ISSUE_TWO         ; 0                                 ; 1                         ; 0                           ; 0                                 ; 0                         ; 1                            ;
; present_state.s_WAIT_DEASSERT_TWO ; 1                                 ; 0                         ; 0                           ; 0                                 ; 0                         ; 1                            ;
+-----------------------------------+-----------------------------------+---------------------------+-----------------------------+-----------------------------------+---------------------------+------------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Name       ; DRsize.101 ; DRsize.100 ; DRsize.011 ; DRsize.010 ; DRsize.001 ; DRsize.000                                                                                                                                                                              ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; DRsize.000 ; 0          ; 0          ; 0          ; 0          ; 0          ; 0                                                                                                                                                                                       ;
; DRsize.001 ; 0          ; 0          ; 0          ; 0          ; 1          ; 1                                                                                                                                                                                       ;
; DRsize.010 ; 0          ; 0          ; 0          ; 1          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.011 ; 0          ; 0          ; 1          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.100 ; 0          ; 1          ; 0          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.101 ; 1          ; 0          ; 0          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Name       ; DRsize.101 ; DRsize.100 ; DRsize.011 ; DRsize.010 ; DRsize.001 ; DRsize.000                                                                                                                                                                              ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; DRsize.000 ; 0          ; 0          ; 0          ; 0          ; 0          ; 0                                                                                                                                                                                       ;
; DRsize.001 ; 0          ; 0          ; 0          ; 0          ; 1          ; 1                                                                                                                                                                                       ;
; DRsize.010 ; 0          ; 0          ; 0          ; 1          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.011 ; 0          ; 0          ; 1          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.100 ; 0          ; 1          ; 0          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
; DRsize.101 ; 1          ; 0          ; 0          ; 0          ; 0          ; 1                                                                                                                                                                                       ;
+------------+------------+------------+------------+------------+------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                                                                                                                                                                                                       ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                                                                                                                                                                                                          ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[0]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[0]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch|data_out                                                                                                                                                              ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|dreg[0]       ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|dreg[0]        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|dreg[0]       ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|dreg[0]        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[1]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rvalid                                                                                                                                                                               ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|user_saw_rvalid                                                                                                                                                                      ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[9]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[1]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rvalid                                                                                                                                                                               ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|user_saw_rvalid                                                                                                                                                                      ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[9]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch|data_in_d1                                                                                                                                                            ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|din_s1        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|din_s1         ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1|din_s1        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer|din_s1         ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[2]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|write_stalled                                                                                                                                                                        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[10]                                                                                                                                                                         ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[7]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[2]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|write_stalled                                                                                                                                                                        ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[10]                                                                                                                                                                         ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[7]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[3]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[0]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|read_req                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[3]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[0]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|read_req                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|write_valid                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[4]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[1]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|read_write                                                                                                                                                                           ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|write_valid                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[4]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[1]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|read_write                                                                                                                                                                           ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|dreg[0] ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|dreg[0] ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|dreg[0] ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|dreg[0] ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[5]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[2]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[5]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[2]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[2]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[1]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[0]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|din_s1  ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|din_s1  ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2|din_s1  ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3|din_s1  ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[2]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[1]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[0]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[3]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[3]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[4]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[4]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[5]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[5]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[6]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[6]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|wdata[7]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|wdata[7]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[6]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[3]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[6]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[3]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|jupdate                                                                                                                                                                              ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[7]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[7]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[8]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[8]                                                                                                                                                                          ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[4]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[4]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|jupdate                                                                                                                                                                              ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[5]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[5]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rdata[6]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rdata[6]                                                                                                                                                                             ; yes                                                              ; yes                                        ;
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+-----------------------------------------------------------------------------+
; Logic Cells Representing Combinational Loops                                ;
+------------------------------------------------------------------------+----+
; Logic Cell Name                                                        ;    ;
+------------------------------------------------------------------------+----+
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[2]~64 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[9]~71 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[8]~70 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[2]~64 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[9]~71 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[8]~70 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[3]~65 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[3]~65 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[4]~66 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[4]~66 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[5]~67 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[5]~67 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[6]~68 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[6]~68 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|Mn_rot_step2[7]~69 ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|Mn_rot_step2[7]~69 ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_rot_step1[2]~64  ;    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_rot_step1[3]~65  ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_rot_step1[2]~64  ;    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_rot_step1[3]~65  ;    ;
; Number of logic cells representing combinational loops                 ; 20 ;
+------------------------------------------------------------------------+----+
Note: All cells listed above may not be present at the end of synthesis due to various synthesis optimizations.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                                                                                                                                                                              ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                                                                                                                  ; Reason for Removal                                                                                                                             ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[0..35]                                                                                   ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[0..35]                                                                                   ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|d1_reasons_to_wait                                                                                                                                          ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|d1_reasons_to_wait                                                                                                                                          ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|E_control_reg_rddata[4..31]                                                                                                                                                                ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_im_addr[0..6]                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_wrap                                                                                             ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_goto1                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_break_pulse                                                                                 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_goto0                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_xbrk:the_cpu_one_nios2_oci_xbrk|xbrk_break                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_xbrk:the_cpu_one_nios2_oci_xbrk|E_xbrk_goto0                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_xbrk:the_cpu_one_nios2_oci_xbrk|E_xbrk_goto1                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|oci_ienable[4..31]                                                                           ; Stuck at VCC due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|E_control_reg_rddata[4..31]                                                                                                                                                                ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_im_addr[0..6]                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_wrap                                                                                             ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_goto1                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_break_pulse                                                                                 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_goto0                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_xbrk:the_cpu_two_nios2_oci_xbrk|xbrk_break                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_xbrk:the_cpu_two_nios2_oci_xbrk|E_xbrk_goto0                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_xbrk:the_cpu_two_nios2_oci_xbrk|E_xbrk_goto1                                                                                     ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|oci_ienable[4..31]                                                                           ; Stuck at VCC due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[0..16]                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[0..16]                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_slavearbiterlockenable                                                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_slavearbiterlockenable                                                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_slavearbiterlockenable                                                                                            ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_slavearbiterlockenable                                                                                            ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_arb_share_counter                                                                                                                         ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|last_cycle_cpu_two_instruction_master_granted_slave_onchip_mem_two_s1                                                                                       ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|last_cycle_cpu_two_data_master_granted_slave_onchip_mem_two_s1                                                                                              ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_saved_chosen_master_vector[1]                                                                                                             ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_reg_firsttransfer                                                                                                                         ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_arb_share_counter                                                                                                                         ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|last_cycle_cpu_one_instruction_master_granted_slave_onchip_mem_one_s1                                                                                       ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|last_cycle_cpu_one_data_master_granted_slave_onchip_mem_one_s1                                                                                              ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_saved_chosen_master_vector[1]                                                                                                             ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_reg_firsttransfer                                                                                                                         ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_arb_share_counter                                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|last_cycle_cpu_two_instruction_master_granted_slave_cpu_two_jtag_debug_module                                                               ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|last_cycle_cpu_two_data_master_granted_slave_cpu_two_jtag_debug_module                                                                      ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_saved_chosen_master_vector[1]                                                                                     ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_reg_firsttransfer                                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_arb_share_counter                                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|last_cycle_cpu_one_instruction_master_granted_slave_cpu_one_jtag_debug_module                                                               ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|last_cycle_cpu_one_data_master_granted_slave_cpu_one_jtag_debug_module                                                                      ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_saved_chosen_master_vector[1]                                                                                     ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_reg_firsttransfer                                                                                                 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rst1                                                                                                                         ; Merged with dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rst1             ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_arb_addend[0]                                                                                                                             ; Merged with dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_arb_addend[1]                 ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_arb_addend[0]                                                                                                                             ; Merged with dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_arb_addend[1]                 ;
; dual_processor_system:my_system|cpu_two_data_master_arbitrator:the_cpu_two_data_master|registered_cpu_two_data_master_readdata[11,23..30]                                                                                                      ; Merged with dual_processor_system:my_system|cpu_two_data_master_arbitrator:the_cpu_two_data_master|registered_cpu_two_data_master_readdata[31] ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|d1_cpu_two_jtag_debug_module_end_xfer                                                                                                       ; Merged with dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|d1_reasons_to_wait              ;
; dual_processor_system:my_system|cpu_one_data_master_arbitrator:the_cpu_one_data_master|registered_cpu_one_data_master_readdata[11,23..30]                                                                                                      ; Merged with dual_processor_system:my_system|cpu_one_data_master_arbitrator:the_cpu_one_data_master|registered_cpu_one_data_master_readdata[31] ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|d1_cpu_one_jtag_debug_module_end_xfer                                                                                                       ; Merged with dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|d1_reasons_to_wait              ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|rst2                                                                                                                         ; Merged with dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rst2             ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|trigger_state                                                                                  ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|trigger_state                                                                                  ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|reset_d1                                                                                                                                                                                   ; Merged with dual_processor_system:my_system|cpu_one:the_cpu_one|reset_d1                                                                       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_break                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_break                                                                                       ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|trigbrktype                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|trigbrktype                                                                                    ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|E_compare_op[1]                                                                                                                                                                            ; Merged with dual_processor_system:my_system|cpu_one:the_cpu_one|E_logic_op[1]                                                                  ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|E_compare_op[0]                                                                                                                                                                            ; Merged with dual_processor_system:my_system|cpu_one:the_cpu_one|E_logic_op[0]                                                                  ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|E_compare_op[1]                                                                                                                                                                            ; Merged with dual_processor_system:my_system|cpu_two:the_cpu_two|E_logic_op[1]                                                                  ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|E_compare_op[0]                                                                                                                                                                            ; Merged with dual_processor_system:my_system|cpu_two:the_cpu_two|E_logic_op[0]                                                                  ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_saved_chosen_master_vector[0]                                                                                                             ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_saved_chosen_master_vector[0]                                                                                                             ; Lost fanout                                                                                                                                    ;
; arbiter:my_arbiter|present_state~10                                                                                                                                                                                                            ; Lost fanout                                                                                                                                    ;
; arbiter:my_arbiter|present_state~11                                                                                                                                                                                                            ; Lost fanout                                                                                                                                    ;
; arbiter:my_arbiter|present_state~12                                                                                                                                                                                                            ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize~24  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize~25  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize~26  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize~24  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize~25  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize~26  ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize.101 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize.101 ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize.011 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize.011 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|DRsize.001 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|DRsize.001 ; Stuck at GND due to stuck port data_in                                                                                                         ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_saved_chosen_master_vector[0]                                                                                     ; Lost fanout                                                                                                                                    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_saved_chosen_master_vector[0]                                                                                     ; Lost fanout                                                                                                                                    ;
; Total Number of Removed Registers = 326                                                                                                                                                                                                        ;                                                                                                                                                ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations                                                                                                                                                                                                                                                                                                ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                                                  ; Reason for Removal        ; Registers Removed due to This Register                                                                                                                        ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_break_pulse ; Stuck at GND              ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_break,     ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|trigbrktype   ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_break_pulse ; Stuck at GND              ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_break,     ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|trigbrktype   ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_slavearbiterlockenable                                    ; Stuck at GND              ; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_saved_chosen_master_vector[1],                           ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_saved_chosen_master_vector[0]                            ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_slavearbiterlockenable                                    ; Stuck at GND              ; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_saved_chosen_master_vector[1],                           ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_saved_chosen_master_vector[0]                            ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_slavearbiterlockenable            ; Stuck at GND              ; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_saved_chosen_master_vector[1],   ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_saved_chosen_master_vector[0]    ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_slavearbiterlockenable            ; Stuck at GND              ; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_saved_chosen_master_vector[1],   ;
;                                                                                                                                                                ; due to stuck port data_in ; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_saved_chosen_master_vector[0]    ;
; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|d1_reasons_to_wait                                                          ; Stuck at GND              ; dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1|onchip_mem_two_s1_reg_firsttransfer                                        ;
;                                                                                                                                                                ; due to stuck port data_in ;                                                                                                                                                               ;
; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|d1_reasons_to_wait                                                          ; Stuck at GND              ; dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1|onchip_mem_one_s1_reg_firsttransfer                                        ;
;                                                                                                                                                                ; due to stuck port data_in ;                                                                                                                                                               ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk|dbrk_goto1       ; Stuck at GND              ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|trigger_state ;
;                                                                                                                                                                ; due to stuck port data_in ;                                                                                                                                                               ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk|dbrk_goto1       ; Stuck at GND              ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|trigger_state ;
;                                                                                                                                                                ; due to stuck port data_in ;                                                                                                                                                               ;
+----------------------------------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 2886  ;
; Number of registers using Synchronous Clear  ; 94    ;
; Number of registers using Synchronous Load   ; 672   ;
; Number of registers using Asynchronous Clear ; 2200  ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 1690  ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Inverted Register Statistics                                                                                                                                               ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; Inverted Register                                                                                                                                                ; Fan out ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+
; dual_processor_system:my_system|cpu_two_data_master_arbitrator:the_cpu_two_data_master|cpu_two_data_master_waitrequest                                           ; 12      ;
; dual_processor_system:my_system|cpu_one_data_master_arbitrator:the_cpu_one_data_master|cpu_one_data_master_waitrequest                                           ; 12      ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|count[9]                                       ; 11      ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|t_dav                                                                                            ; 3       ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|count[9]                                       ; 11      ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|t_dav                                                                                            ; 3       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_pipe_flush                                                                                                 ; 30      ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|hbreak_enabled                                                                                               ; 8       ;
; dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module|cpu_two_jtag_debug_module_arb_addend[0]                       ; 6       ;
; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|av_waitrequest                                                                                   ; 2       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_pipe_flush                                                                                                 ; 30      ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|hbreak_enabled                                                                                               ; 8       ;
; dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module|cpu_one_jtag_debug_module_arb_addend[0]                       ; 6       ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|av_waitrequest                                                                                   ; 2       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_wr_dst_reg                                                                                                 ; 67      ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_wr_dst_reg                                                                                                 ; 67      ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rst2                                           ; 4       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|oci_ienable[2] ; 2       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|oci_ienable[1] ; 2       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|oci_ienable[0] ; 2       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|oci_ienable[2] ; 2       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|oci_ienable[1] ; 2       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|oci_ienable[0] ; 2       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg|oci_ienable[3] ; 2       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg|oci_ienable[3] ; 2       ;
; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|rst1                                           ; 1       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_pipe_flush_waddr[12]                                                                                       ; 1       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_pipe_flush_waddr[12]                                                                                       ; 1       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|ic_tag_clr_valid_bits                                                                                        ; 1       ;
; dual_processor_system:my_system|cpu_two:the_cpu_two|M_pipe_flush_waddr[17]                                                                                       ; 1       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|ic_tag_clr_valid_bits                                                                                        ; 1       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|M_pipe_flush_waddr[17]                                                                                       ; 1       ;
; dual_processor_system:my_system|cpu_one:the_cpu_one|reset_d1                                                                                                     ; 8       ;
; sld_hub:sld_hub_inst|tdo                                                                                                                                         ; 2       ;
; Total number of inverted registers = 34                                                                                                                          ;         ;
+------------------------------------------------------------------------------------------------------------------------------------------------------------------+---------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                                                                                                                      ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                                                                                                            ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|count[0]                                                                                                                 ;
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|count[8]                                                                                                                 ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|bridge_two:the_bridge_two|time_out_counter[2]                                                                                                                                                              ;
; 3:1                ; 8 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|bridge_one:the_bridge_one|time_out_counter[7]                                                                                                                                                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_mem_byte_en[1]                                                                                                                                                                       ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_mem_byte_en[0]                                                                                                                                                                       ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|E_src2_prelim[22]                                                                                                                                                                      ;
; 3:1                ; 15 bits   ; 30 LEs        ; 30 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|E_src2_imm[27]                                                                                                                                                                         ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|E_src1_prelim[18]                                                                                                                                                                      ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|av_ld_data_aligned_or_div[1]                                                                                                                                                           ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|E_src2_prelim[3]                                                                                                                                                                       ;
; 3:1                ; 15 bits   ; 30 LEs        ; 30 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|E_src2_imm[30]                                                                                                                                                                         ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|E_src1_prelim[24]                                                                                                                                                                      ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|av_ld_data_aligned_or_div[0]                                                                                                                                                           ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|D_iw[13]                                                                                                                                                                               ;
; 3:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|D_iw[15]                                                                                                                                                                               ;
; 3:1                ; 32 bits   ; 64 LEs        ; 32 LEs               ; 32 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|bridge_one:the_bridge_one|avalon_readdata[11]                                                                                                                                                              ;
; 3:1                ; 32 bits   ; 64 LEs        ; 32 LEs               ; 32 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|bridge_two:the_bridge_two|avalon_readdata[23]                                                                                                                                                              ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|ic_fill_ap_cnt[2]                                                                                                                                                                      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|ic_fill_ap_offset[2]                                                                                                                                                                   ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|ic_fill_ap_cnt[0]                                                                                                                                                                      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|ic_fill_ap_offset[1]                                                                                                                                                                   ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[8]                                                                                                              ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[8]                                                                                                              ;
; 8:1                ; 3 bits    ; 15 LEs        ; 6 LEs                ; 9 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|E_control_reg_rddata[1]                                                                                                                                                                ;
; 8:1                ; 3 bits    ; 15 LEs        ; 6 LEs                ; 9 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|E_control_reg_rddata[1]                                                                                                                                                                ;
; 4:1                ; 22 bits   ; 44 LEs        ; 44 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|MonDReg[31]                                                                                      ;
; 4:1                ; 22 bits   ; 44 LEs        ; 44 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|MonDReg[0]                                                                                       ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|ic_tag_wraddress[3]                                                                                                                                                                    ;
; 4:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|ic_tag_wraddress[0]                                                                                                                                                                    ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|F_pc[17]                                                                                                                                                                               ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|F_pc[14]                                                                                                                                                                               ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|MonDReg[29]                                                                                      ;
; 4:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|MonDReg[29]                                                                                      ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_st_data[30]                                                                                                                                                                          ;
; 3:1                ; 8 bits    ; 16 LEs        ; 16 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_st_data[30]                                                                                                                                                                          ;
; 6:1                ; 2 bits    ; 8 LEs         ; 2 LEs                ; 6 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|sr[36] ;
; 6:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|sr[34] ;
; 6:1                ; 13 bits   ; 52 LEs        ; 26 LEs               ; 26 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|sr[5]  ;
; 6:1                ; 16 bits   ; 64 LEs        ; 32 LEs               ; 32 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|sr[27] ;
; 6:1                ; 2 bits    ; 8 LEs         ; 2 LEs                ; 6 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|sr[36] ;
; 6:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|sr[33] ;
; 6:1                ; 13 bits   ; 52 LEs        ; 26 LEs               ; 26 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|sr[3]  ;
; 6:1                ; 16 bits   ; 64 LEs        ; 32 LEs               ; 32 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|sr[18] ;
; 4:1                ; 9 bits    ; 18 LEs        ; 9 LEs                ; 9 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|MonAReg[10]                                                                                      ;
; 4:1                ; 9 bits    ; 18 LEs        ; 9 LEs                ; 9 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|MonAReg[2]                                                                                       ;
; 5:1                ; 2 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_mem_byte_en[2]                                                                                                                                                                       ;
; 5:1                ; 2 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_mem_byte_en[2]                                                                                                                                                                       ;
; 5:1                ; 32 bits   ; 96 LEs        ; 32 LEs               ; 64 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break|break_readreg[7]                                                                           ;
; 5:1                ; 32 bits   ; 96 LEs        ; 32 LEs               ; 64 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break|break_readreg[17]                                                                          ;
; 7:1                ; 16 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_pipe_flush_waddr[15]                                                                                                                                                                 ;
; 7:1                ; 16 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_pipe_flush_waddr[1]                                                                                                                                                                  ;
; 5:1                ; 3 bits    ; 9 LEs         ; 6 LEs                ; 3 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[3]                                                                                                              ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic|td_shift[6]                                                                                                              ;
; 5:1                ; 3 bits    ; 9 LEs         ; 6 LEs                ; 3 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[3]                                                                                                              ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic|td_shift[6]                                                                                                              ;
; 9:1                ; 12 bits   ; 72 LEs        ; 48 LEs               ; 24 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_alu_result[30]                                                                                                                                                                       ;
; 9:1                ; 16 bits   ; 96 LEs        ; 80 LEs               ; 16 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_alu_result[17]                                                                                                                                                                       ;
; 9:1                ; 12 bits   ; 72 LEs        ; 48 LEs               ; 24 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_alu_result[20]                                                                                                                                                                       ;
; 9:1                ; 16 bits   ; 96 LEs        ; 80 LEs               ; 16 LEs                 ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_alu_result[8]                                                                                                                                                                        ;
; 7:1                ; 2 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_pipe_flush_waddr[17]                                                                                                                                                                 ;
; 7:1                ; 2 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; Yes        ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_pipe_flush_waddr[17]                                                                                                                                                                 ;
; 4:1                ; 18 bits   ; 36 LEs        ; 36 LEs               ; 0 LEs                  ; No         ; |chat_room|sram:my_sram|temp_data_to_sram[14]                                                                                                                                                                                                         ;
; 4:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|M_wr_data_unfiltered[11]                                                                                                                                                               ;
; 4:1                ; 32 bits   ; 64 LEs        ; 64 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|M_wr_data_unfiltered[29]                                                                                                                                                               ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|D_dst_regnum[1]                                                                                                                                                                        ;
; 4:1                ; 5 bits    ; 10 LEs        ; 10 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|D_dst_regnum[4]                                                                                                                                                                        ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|readdata[0]                                                                                                                                    ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|readdata[1]                                                                                                                                    ;
; 4:1                ; 10 bits   ; 20 LEs        ; 20 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|F_ic_tag_rd_addr_nxt[1]                                                                                                                                                                ;
; 4:1                ; 10 bits   ; 20 LEs        ; 20 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|F_ic_tag_rd_addr_nxt[2]                                                                                                                                                                ;
; 9:1                ; 2 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_one:the_cpu_one|E_wrctl_data_ienable_reg_irq3                                                                                                                                                          ;
; 9:1                ; 2 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; No         ; |chat_room|dual_processor_system:my_system|cpu_two:the_cpu_two|E_wrctl_data_ienable_reg_irq3                                                                                                                                                          ;
; 20:1               ; 4 bits    ; 52 LEs        ; 44 LEs               ; 8 LEs                  ; Yes        ; |chat_room|pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|VELJ8121:JDCF0099|DJFL8584[2]                                                                                                                                                                   ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irf_reg[1][4]                                                                                                                                                                                                         ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irf_reg[2][0]                                                                                                                                                                                                         ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irf_reg[3][0]                                                                                                                                                                                                         ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irf_reg[4][1]                                                                                                                                                                                                         ;
; 6:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irf_reg[5][0]                                                                                                                                                                                                         ;
; 5:1                ; 6 bits    ; 18 LEs        ; 6 LEs                ; 12 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|sld_rom_sr:hub_info_reg|word_counter[1]                                                                                                                                                                               ;
; 7:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|shadow_irf_reg[1][0]                                                                                                                                                                                                  ;
; 7:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|shadow_irf_reg[2][4]                                                                                                                                                                                                  ;
; 7:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|shadow_irf_reg[3][0]                                                                                                                                                                                                  ;
; 7:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|shadow_irf_reg[4][0]                                                                                                                                                                                                  ;
; 7:1                ; 6 bits    ; 24 LEs        ; 6 LEs                ; 18 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|shadow_irf_reg[5][0]                                                                                                                                                                                                  ;
; 52:1               ; 4 bits    ; 136 LEs       ; 96 LEs               ; 40 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|sld_rom_sr:hub_info_reg|WORD_SR[1]                                                                                                                                                                                    ;
; 14:1               ; 6 bits    ; 54 LEs        ; 24 LEs               ; 30 LEs                 ; Yes        ; |chat_room|sld_hub:sld_hub_inst|irsr_reg[3]                                                                                                                                                                                                           ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                           ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                            ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram|altsyncram_7eg1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                         ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                          ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram|altsyncram_44g1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram|altsyncram_54g1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_ud72:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                                                                             ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                                                                              ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                ; Value          ; From ; To                                                                                                                                                                                                     ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[37]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[36]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[35]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[34]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[33]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[32]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[31]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[30]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[29]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[28]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[27]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[26]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[25]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[24]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[23]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[22]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[21]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[20]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[19]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[18]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[17]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[16]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[15]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[14]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[13]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[12]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[11]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[10]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[9]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[8]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[7]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[6]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[5]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[4]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[3]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[2]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[1]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[0]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.011                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.100                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.101                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.010                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.001                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.000                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[0]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[1]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[2]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[3]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[4]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[5]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[6]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[7]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[8]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[9]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[10]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[11]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[12]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[13]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[14]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[15]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[16]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[17]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[18]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[19]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[20]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[21]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[22]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[23]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[24]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[25]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[26]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[27]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[28]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[29]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[30]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[31]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[32]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[33]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[34]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[35]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[36]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[37]~reg0                                                                                                                                                                                            ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                 ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                            ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                            ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                            ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                             ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                             ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                             ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                             ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                  ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                             ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                             ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                             ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                              ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                              ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                              ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                              ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                ; Value     ; From ; To                                                                                                                                                                                                                ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[37]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[36]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[35]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[34]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[33]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[32]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[31]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[30]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[29]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[28]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[27]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[26]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[25]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[24]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[23]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[22]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[21]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[20]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[19]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[18]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[17]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[16]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[15]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[14]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[13]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[12]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[11]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[10]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[9]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[8]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[7]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[6]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[5]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[4]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[3]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[2]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[1]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[0]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[2]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[1]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[0]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; jxuir                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[3]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[4]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[5]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[6]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[7]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[8]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[9]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[10]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[11]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[12]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[13]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[14]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[15]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[16]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[17]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[18]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[19]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[20]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[21]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[22]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[23]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[24]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[25]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[26]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[27]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[28]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[29]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[30]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[31]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[32]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[33]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[34]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[35]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[36]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[37]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; ir[0]                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; ir[1]                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; sync2_uir                                                                                                                                                                                                         ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; enable_action_strobe                                                                                                                                                                                              ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; update_jdo_strobe                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; sync2_udr                                                                                                                                                                                                         ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                        ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                                   ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                                    ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                                    ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                        ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                                   ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                                    ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                                    ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                           ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                            ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram|altsyncram_veg1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                         ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                          ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram|altsyncram_s4g1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram|altsyncram_t4g1:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                           ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                            ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_me72:auto_generated ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                                                                             ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                                                                              ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                ; Value          ; From ; To                                                                                                                                                                                                     ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[37]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[36]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[35]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[34]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[33]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[32]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[31]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[30]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[29]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[28]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[27]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[26]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[25]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[24]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[23]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[22]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[21]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[20]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[19]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[18]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[17]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[16]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[15]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[14]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[13]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[12]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[11]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[10]                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[9]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[8]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[7]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[6]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[5]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[4]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[3]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[2]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[1]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[0]                                                                                                                                                                                                  ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.011                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.100                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.101                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.010                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.001                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; DRsize.000                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[0]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[1]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[2]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[3]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[4]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[5]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[6]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[7]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[8]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[9]~reg0                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[10]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[11]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[12]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[13]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[14]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[15]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[16]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[17]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[18]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[19]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[20]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[21]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[22]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[23]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[24]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[25]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[26]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[27]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[28]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[29]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[30]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[31]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[32]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[33]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[34]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[35]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[36]~reg0                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103,R101 ; -    ; sr[37]~reg0                                                                                                                                                                                            ;
+---------------------------+----------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                 ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                            ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                            ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                            ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                             ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                             ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                             ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                             ;
+-----------------------------+----------------------------------------------------------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                  ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                             ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                             ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                             ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                              ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                              ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                              ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                              ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                ; Value     ; From ; To                                                                                                                                                                                                                ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[37]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[36]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[35]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[34]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[33]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[32]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[31]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[30]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[29]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[28]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[27]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[26]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[25]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[24]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[23]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[22]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[21]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[20]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[19]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[18]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[17]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[16]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[15]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[14]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[13]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[12]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[11]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[10]                                                                                                                                                                                                           ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[9]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[8]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[7]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[6]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[5]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[4]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[3]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[2]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[1]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[0]                                                                                                                                                                                                            ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[2]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[1]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[0]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; jxuir                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[3]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[4]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[5]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[6]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[7]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[8]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[9]~reg0                                                                                                                                                                                                       ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[10]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[11]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[12]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[13]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[14]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[15]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[16]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[17]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[18]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[19]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[20]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[21]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[22]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[23]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[24]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[25]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[26]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[27]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[28]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[29]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[30]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[31]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[32]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[33]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[34]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[35]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[36]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; jdo[37]~reg0                                                                                                                                                                                                      ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; ir[0]                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,R101 ; -    ; ir[1]                                                                                                                                                                                                             ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; sync2_uir                                                                                                                                                                                                         ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; enable_action_strobe                                                                                                                                                                                              ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; update_jdo_strobe                                                                                                                                                                                                 ;
; SUPPRESS_DA_RULE_INTERNAL ; D101,D103 ; -    ; sync2_udr                                                                                                                                                                                                         ;
+---------------------------+-----------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                        ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                                   ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                                    ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                                    ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value                                                                ; From ; To                                                                                                                                                                                                        ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; dreg[0]                                                                                                                                                                                                   ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; dreg[0]                                                                                                                                                                                                   ;
; SYNCHRONIZER_IDENTIFICATION ; FORCED_IF_ASYNCHRONOUS                                               ; -    ; din_s1                                                                                                                                                                                                    ;
; DONT_MERGE_REGISTER         ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; PRESERVE_REGISTER           ; ON                                                                   ; -    ; din_s1                                                                                                                                                                                                    ;
; SDC_STATEMENT               ; set_false_path -to [get_keepers {*altera_std_synchronizer:*|din_s1}] ; -    ; din_s1                                                                                                                                                                                                    ;
+-----------------------------+----------------------------------------------------------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one ;
+---------------------------+---------------------+------+-------------------------------+
; Assignment                ; Value               ; From ; To                            ;
+---------------------------+---------------------+------+-------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; R101,C106,D101,D103 ; -    ; -                             ;
+---------------------------+---------------------+------+-------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                     ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                      ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                     ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                      ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                                                    ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[10]                                                                                          ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[9]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[8]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[7]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[6]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[5]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[4]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[3]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[2]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[1]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[0]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; user_saw_rvalid                                                                                       ;
; PRESERVE_REGISTER ; ON    ; -    ; write_valid                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; read_req                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; read_write                                                                                            ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[7]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[7]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[6]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[6]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[5]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[5]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[4]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[4]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[3]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[3]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[2]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[2]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[1]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[1]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[0]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[0]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; write_stalled                                                                                         ;
; PRESERVE_REGISTER ; ON    ; -    ; jupdate                                                                                               ;
; PRESERVE_REGISTER ; ON    ; -    ; rvalid                                                                                                ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[7]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[6]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[5]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[4]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[3]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[2]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[1]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[0]                                                                                              ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two ;
+---------------------------+---------------------+------+-------------------------------+
; Assignment                ; Value               ; From ; To                            ;
+---------------------------+---------------------+------+-------------------------------+
; SUPPRESS_DA_RULE_INTERNAL ; R101,C106,D101,D103 ; -    ; -                             ;
+---------------------------+---------------------+------+-------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                     ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                      ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2 ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                     ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                      ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                                                    ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[10]                                                                                          ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[9]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[8]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[7]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[6]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[5]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[4]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[3]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[2]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[1]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; td_shift[0]                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; user_saw_rvalid                                                                                       ;
; PRESERVE_REGISTER ; ON    ; -    ; write_valid                                                                                           ;
; PRESERVE_REGISTER ; ON    ; -    ; read_req                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; read_write                                                                                            ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[7]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[7]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[6]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[6]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[5]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[5]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[4]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[4]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[3]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[3]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[2]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[2]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[1]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[1]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; wdata[0]                                                                                              ;
; DISABLE_DA_RULE   ; D102  ; -    ; wdata[0]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; write_stalled                                                                                         ;
; PRESERVE_REGISTER ; ON    ; -    ; jupdate                                                                                               ;
; PRESERVE_REGISTER ; ON    ; -    ; rvalid                                                                                                ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[7]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[6]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[5]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[4]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[3]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[2]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[1]                                                                                              ;
; PRESERVE_REGISTER ; ON    ; -    ; rdata[0]                                                                                              ;
+-------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram|altsyncram_lvb1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                  ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                   ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram|altsyncram_d0c1:auto_generated ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                  ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                   ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch ;
+---------------------------+-------+------+--------------------------------------------------------------------------------------------------------------+
; Assignment                ; Value ; From ; To                                                                                                           ;
+---------------------------+-------+------+--------------------------------------------------------------------------------------------------------------+
; PRESERVE_REGISTER         ; ON    ; -    ; data_out                                                                                                     ;
; SUPPRESS_DA_RULE_INTERNAL ; R101  ; -    ; data_out                                                                                                     ;
; PRESERVE_REGISTER         ; ON    ; -    ; data_out~reg0                                                                                                ;
; SUPPRESS_DA_RULE_INTERNAL ; R101  ; -    ; data_out~reg0                                                                                                ;
; CUT                       ; ON    ; *    ; data_in_d1                                                                                                   ;
; PRESERVE_REGISTER         ; ON    ; -    ; data_in_d1                                                                                                   ;
; SUPPRESS_DA_RULE_INTERNAL ; R101  ; -    ; data_in_d1                                                                                                   ;
+---------------------------+-------+------+--------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------+
; Source assignments for pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst ;
+------------------------------+-------+------+---------------------+
; Assignment                   ; Value ; From ; To                  ;
+------------------------------+-------+------+---------------------+
; POWER_UP_LEVEL               ; LOW   ; -    ; -                   ;
; IGNORE_LCELL_BUFFERS         ; OFF   ; -    ; -                   ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; OFF   ; -    ; -                   ;
; MESSAGE_DISABLE              ; 17048 ; -    ; -                   ;
+------------------------------+-------+------+---------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for pzdyqx:nabboc|pzdyqx_impl:pzdyqx_impl_inst|MDCK2395:\cycloneii_WCRO7487_gen_0:cycloneii_WCRO7487_gen_1 ;
+------------+-------+------+---------------------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To                                                                                                ;
+------------+-------+------+---------------------------------------------------------------------------------------------------+
; CUT        ; ON    ; -    ; EPEO2888_7                                                                                        ;
; CUT        ; ON    ; -    ; lcell:LJMV0916_0                                                                                  ;
; CUT        ; ON    ; -    ; EPEO2888_0                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_1                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_2                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_3                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_4                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_5                                                                                        ;
; CUT        ; ON    ; -    ; EPEO2888_6                                                                                        ;
; CUT        ; ON    ; -    ; lcell:WCRO7487_0                                                                                  ;
+------------+-------+------+---------------------------------------------------------------------------------------------------+


+-------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst           ;
+------------------------------+-------+------+---------+
; Assignment                   ; Value ; From ; To      ;
+------------------------------+-------+------+---------+
; IGNORE_LCELL_BUFFERS         ; OFF   ; -    ; -       ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; OFF   ; -    ; -       ;
; NOT_GATE_PUSH_BACK           ; OFF   ; -    ; clr_reg ;
; POWER_UP_LEVEL               ; LOW   ; -    ; clr_reg ;
+------------------------------+-------+------+---------+


+---------------------------------------------------------------------+
; Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:hub_info_reg ;
+----------------------+-------+------+-------------------------------+
; Assignment           ; Value ; From ; To                            ;
+----------------------+-------+------+-------------------------------+
; AUTO_ROM_RECOGNITION ; OFF   ; -    ; -                             ;
+----------------------+-------+------+-------------------------------+


+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|bridge_one:the_bridge_one ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------+
; ADDR_BITS      ; 17    ; Signed Integer                                                                ;
; DATA_BITS      ; 32    ; Signed Integer                                                                ;
; ADDR_LOW       ; 2     ; Signed Integer                                                                ;
; BYTE_EN_BITS   ; 4     ; Signed Integer                                                                ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|bridge_two:the_bridge_two ;
+----------------+-------+-------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------+
; ADDR_BITS      ; 17    ; Signed Integer                                                                ;
; DATA_BITS      ; 32    ; Signed Integer                                                                ;
; ADDR_LOW       ; 2     ; Signed Integer                                                                ;
; BYTE_EN_BITS   ; 4     ; Signed Integer                                                                ;
+----------------+-------+-------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value  ; Type                                                                                                          ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
; lpm_file       ; UNUSED ; String                                                                                                        ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                  ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                        ;
; WIDTHAD_A                          ; 10                   ; Signed Integer                                                                                        ;
; NUMWORDS_A                         ; 1024                 ; Signed Integer                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                        ;
; WIDTHAD_B                          ; 10                   ; Signed Integer                                                                                        ;
; NUMWORDS_B                         ; 1024                 ; Signed Integer                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                               ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_qed1      ; Untyped                                                                                               ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
; Parameter Name ; Value                  ; Type                                                                                        ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_one_ic_tag_ram.mif ; String                                                                                      ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                  ; Type                                                                                              ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                      ; Untyped                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                     ; AUTO_CARRY                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                    ; IGNORE_CARRY                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                     ; AUTO_CASCADE                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                    ; IGNORE_CASCADE                                                                                    ;
; WIDTH_BYTEENA                      ; 1                      ; Untyped                                                                                           ;
; OPERATION_MODE                     ; DUAL_PORT              ; Untyped                                                                                           ;
; WIDTH_A                            ; 16                     ; Signed Integer                                                                                    ;
; WIDTHAD_A                          ; 7                      ; Signed Integer                                                                                    ;
; NUMWORDS_A                         ; 128                    ; Signed Integer                                                                                    ;
; OUTDATA_REG_A                      ; UNREGISTERED           ; Untyped                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                   ; Untyped                                                                                           ;
; INDATA_ACLR_A                      ; NONE                   ; Untyped                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; WIDTH_B                            ; 16                     ; Signed Integer                                                                                    ;
; WIDTHAD_B                          ; 7                      ; Signed Integer                                                                                    ;
; NUMWORDS_B                         ; 128                    ; Signed Integer                                                                                    ;
; INDATA_REG_B                       ; CLOCK1                 ; Untyped                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1                 ; Untyped                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK0                 ; Untyped                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK0                 ; Untyped                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED           ; Untyped                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1                 ; Untyped                                                                                           ;
; INDATA_ACLR_B                      ; NONE                   ; Untyped                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                   ; Untyped                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                   ; Untyped                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                      ; Untyped                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                      ; Untyped                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                   ; Untyped                                                                                           ;
; BYTE_SIZE                          ; 8                      ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA               ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ   ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ   ; Untyped                                                                                           ;
; INIT_FILE                          ; cpu_one_ic_tag_ram.mif ; Untyped                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A                 ; Untyped                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                      ; Signed Integer                                                                                    ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN        ; Untyped                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN        ; Untyped                                                                                           ;
; ENABLE_ECC                         ; FALSE                  ; Untyped                                                                                           ;
; DEVICE_FAMILY                      ; Cyclone II             ; Untyped                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_7eg1        ; Untyped                                                                                           ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                ; Type                                                                                                            ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_one_rf_ram_a.mif ; String                                                                                                          ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; INIT_FILE                          ; cpu_one_rf_ram_a.mif ; Untyped                                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_44g1      ; Untyped                                                                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                ; Type                                                                                                            ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_one_rf_ram_b.mif ; String                                                                                                          ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; INIT_FILE                          ; cpu_one_rf_ram_b.mif ; Untyped                                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_54g1      ; Untyped                                                                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1 ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name                        ; Value             ; Type                                                                                                            ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS                     ; ON                ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS                  ; OFF               ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS                   ; ON                ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS                ; OFF               ; IGNORE_CASCADE                                                                                                  ;
; ACCUM_DIRECTION                       ; ADD               ; Untyped                                                                                                         ;
; ACCUM_SLOAD_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUM_SLOAD_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUMULATOR                           ; NO                ; Untyped                                                                                                         ;
; ADDER1_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDER3_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR1              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR3              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR1     ; ACLR0             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR3     ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER1          ; UNREGISTERED      ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER3          ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ADDER                        ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_REGISTER                     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUNDING                     ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_ACLR       ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_REGISTER   ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATION                   ; NO                ; Untyped                                                                                                         ;
; DEDICATED_MULTIPLIER_CIRCUITRY        ; YES               ; Untyped                                                                                                         ;
; DSP_BLOCK_BALANCING                   ; AUTO              ; Untyped                                                                                                         ;
; EXTRA_LATENCY                         ; 0                 ; Untyped                                                                                                         ;
; INPUT_ACLR_A0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_REGISTER_A0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_A1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_B1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_SOURCE_A0                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A1                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A2                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A3                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B0                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B1                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B2                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B3                       ; DATAB             ; Untyped                                                                                                         ;
; MULT01_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT01_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT01_SATURATION_ACLR                ; ACLR2             ; Untyped                                                                                                         ;
; MULT01_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_SATURATION_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER01_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER01_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER1_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER23_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER23_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER3_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR0                      ; ACLR0             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR1                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR2                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR3                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER0                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER1                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER2                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER3                  ; CLOCK0            ; Untyped                                                                                                         ;
; NUMBER_OF_MULTIPLIERS                 ; 1                 ; Signed Integer                                                                                                  ;
; OUTPUT_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_REGISTER                       ; UNREGISTERED      ; Untyped                                                                                                         ;
; OUTPUT_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_TYPE                     ; NEAREST_INTEGER   ; Untyped                                                                                                         ;
; OUTPUT_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_TYPE                  ; ASYMMETRIC        ; Untyped                                                                                                         ;
; OUTPUT_SATURATION                     ; NO                ; Untyped                                                                                                         ;
; port_addnsub1                         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_addnsub3                         ; PORT_CONNECTIVITY ; Untyped                                                                                                         ;
; PORT_CHAINOUT_SAT_IS_OVERFLOW         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; PORT_MULT0_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT1_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT2_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT3_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_OUTPUT_IS_OVERFLOW               ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signa                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signb                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; REPRESENTATION_A                      ; UNSIGNED          ; Untyped                                                                                                         ;
; REPRESENTATION_B                      ; UNSIGNED          ; Untyped                                                                                                         ;
; ROTATE_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_REGISTER                       ; CLOCK0            ; Untyped                                                                                                         ;
; WIDTH_MSB                             ; 17                ; Untyped                                                                                                         ;
; WIDTH_SATURATE_SIGN                   ; 1                 ; Untyped                                                                                                         ;
; SCANOUTA_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; SCANOUTA_REGISTER                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SHIFT_MODE                            ; NO                ; Untyped                                                                                                         ;
; SHIFT_RIGHT_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_ACLR               ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_REGISTER           ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_ACLR_A                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_ACLR_B                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_A                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_B                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_A            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_B            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_REGISTER_A                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SIGNED_REGISTER_B                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; WIDTH_A                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_B                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_CHAININ                         ; 1                 ; Untyped                                                                                                         ;
; WIDTH_RESULT                          ; 32                ; Signed Integer                                                                                                  ;
; ZERO_CHAINOUT_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_CHAINOUT_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_ACLR           ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_REGISTER       ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; CBXI_PARAMETER                        ; mult_add_4cr2     ; Untyped                                                                                                         ;
; DEVICE_FAMILY                         ; Cyclone II        ; Untyped                                                                                                         ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2 ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name                        ; Value             ; Type                                                                                                            ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS                     ; ON                ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS                  ; OFF               ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS                   ; ON                ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS                ; OFF               ; IGNORE_CASCADE                                                                                                  ;
; ACCUM_DIRECTION                       ; ADD               ; Untyped                                                                                                         ;
; ACCUM_SLOAD_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUM_SLOAD_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUMULATOR                           ; NO                ; Untyped                                                                                                         ;
; ADDER1_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDER3_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR1              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR3              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR1     ; ACLR0             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR3     ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER1          ; UNREGISTERED      ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER3          ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ADDER                        ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_REGISTER                     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUNDING                     ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_ACLR       ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_REGISTER   ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATION                   ; NO                ; Untyped                                                                                                         ;
; DEDICATED_MULTIPLIER_CIRCUITRY        ; YES               ; Untyped                                                                                                         ;
; DSP_BLOCK_BALANCING                   ; AUTO              ; Untyped                                                                                                         ;
; EXTRA_LATENCY                         ; 0                 ; Untyped                                                                                                         ;
; INPUT_ACLR_A0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_REGISTER_A0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_A1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_B1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_SOURCE_A0                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A1                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A2                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A3                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B0                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B1                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B2                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B3                       ; DATAB             ; Untyped                                                                                                         ;
; MULT01_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT01_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT01_SATURATION_ACLR                ; ACLR2             ; Untyped                                                                                                         ;
; MULT01_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_SATURATION_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER01_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER01_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER1_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER23_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER23_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER3_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR0                      ; ACLR0             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR1                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR2                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR3                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER0                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER1                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER2                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER3                  ; CLOCK0            ; Untyped                                                                                                         ;
; NUMBER_OF_MULTIPLIERS                 ; 1                 ; Signed Integer                                                                                                  ;
; OUTPUT_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_REGISTER                       ; UNREGISTERED      ; Untyped                                                                                                         ;
; OUTPUT_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_TYPE                     ; NEAREST_INTEGER   ; Untyped                                                                                                         ;
; OUTPUT_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_TYPE                  ; ASYMMETRIC        ; Untyped                                                                                                         ;
; OUTPUT_SATURATION                     ; NO                ; Untyped                                                                                                         ;
; port_addnsub1                         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_addnsub3                         ; PORT_CONNECTIVITY ; Untyped                                                                                                         ;
; PORT_CHAINOUT_SAT_IS_OVERFLOW         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; PORT_MULT0_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT1_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT2_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT3_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_OUTPUT_IS_OVERFLOW               ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signa                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signb                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; REPRESENTATION_A                      ; UNSIGNED          ; Untyped                                                                                                         ;
; REPRESENTATION_B                      ; UNSIGNED          ; Untyped                                                                                                         ;
; ROTATE_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_REGISTER                       ; CLOCK0            ; Untyped                                                                                                         ;
; WIDTH_MSB                             ; 17                ; Untyped                                                                                                         ;
; WIDTH_SATURATE_SIGN                   ; 1                 ; Untyped                                                                                                         ;
; SCANOUTA_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; SCANOUTA_REGISTER                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SHIFT_MODE                            ; NO                ; Untyped                                                                                                         ;
; SHIFT_RIGHT_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_ACLR               ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_REGISTER           ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_ACLR_A                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_ACLR_B                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_A                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_B                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_A            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_B            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_REGISTER_A                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SIGNED_REGISTER_B                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; WIDTH_A                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_B                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_CHAININ                         ; 1                 ; Untyped                                                                                                         ;
; WIDTH_RESULT                          ; 16                ; Signed Integer                                                                                                  ;
; ZERO_CHAINOUT_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_CHAINOUT_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_ACLR           ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_REGISTER       ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; CBXI_PARAMETER                        ; mult_add_6cr2     ; Untyped                                                                                                         ;
; DEVICE_FAMILY                         ; Cyclone II        ; Untyped                                                                                                         ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                               ; Type                                                                                                                                                                                                               ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_one_ociram_default_contents.mif ; String                                                                                                                                                                                                             ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                               ; Type                                                                                                                                                                                                                     ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                                   ; Untyped                                                                                                                                                                                                                  ;
; AUTO_CARRY_CHAINS                  ; ON                                  ; AUTO_CARRY                                                                                                                                                                                                               ;
; IGNORE_CARRY_BUFFERS               ; OFF                                 ; IGNORE_CARRY                                                                                                                                                                                                             ;
; AUTO_CASCADE_CHAINS                ; ON                                  ; AUTO_CASCADE                                                                                                                                                                                                             ;
; IGNORE_CASCADE_BUFFERS             ; OFF                                 ; IGNORE_CASCADE                                                                                                                                                                                                           ;
; WIDTH_BYTEENA                      ; 1                                   ; Untyped                                                                                                                                                                                                                  ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT                     ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_A                            ; 32                                  ; Signed Integer                                                                                                                                                                                                           ;
; WIDTHAD_A                          ; 8                                   ; Signed Integer                                                                                                                                                                                                           ;
; NUMWORDS_A                         ; 256                                 ; Signed Integer                                                                                                                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED                        ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_ACLR_A                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; INDATA_ACLR_A                      ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_B                            ; 32                                  ; Signed Integer                                                                                                                                                                                                           ;
; WIDTHAD_B                          ; 8                                   ; Signed Integer                                                                                                                                                                                                           ;
; NUMWORDS_B                         ; 256                                 ; Signed Integer                                                                                                                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; RDCONTROL_REG_B                    ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_REG_B                      ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_REG_B                      ; UNREGISTERED                        ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_REG_B                      ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; INDATA_ACLR_B                      ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_ACLR_B                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; RDCONTROL_ACLR_B                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_BYTEENA_A                    ; 4                                   ; Signed Integer                                                                                                                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                                   ; Untyped                                                                                                                                                                                                                  ;
; RAM_BLOCK_TYPE                     ; AUTO                                ; Untyped                                                                                                                                                                                                                  ;
; BYTE_SIZE                          ; 8                                   ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                            ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ                ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ                ; Untyped                                                                                                                                                                                                                  ;
; INIT_FILE                          ; cpu_one_ociram_default_contents.mif ; Untyped                                                                                                                                                                                                                  ;
; INIT_FILE_LAYOUT                   ; PORT_A                              ; Untyped                                                                                                                                                                                                                  ;
; MAXIMUM_DEPTH                      ; 0                                   ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN                     ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN                     ; Untyped                                                                                                                                                                                                                  ;
; ENABLE_ECC                         ; FALSE                               ; Untyped                                                                                                                                                                                                                  ;
; DEVICE_FAMILY                      ; Cyclone II                          ; Untyped                                                                                                                                                                                                                  ;
; CBXI_PARAMETER                     ; altsyncram_ud72                     ; Untyped                                                                                                                                                                                                                  ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value  ; Type                                                                                                                                                                                                                                                ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; UNUSED ; String                                                                                                                                                                                                                                              ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                                                                                                                                        ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                                                                                                                                                     ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                                                                                                                                                  ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                                                                                                                                                ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                                                                                                                                                ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                                                                                                                                              ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT      ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_A                            ; 36                   ; Signed Integer                                                                                                                                                                                                                              ;
; WIDTHAD_A                          ; 7                    ; Signed Integer                                                                                                                                                                                                                              ;
; NUMWORDS_A                         ; 128                  ; Signed Integer                                                                                                                                                                                                                              ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_B                            ; 36                   ; Signed Integer                                                                                                                                                                                                                              ;
; WIDTHAD_B                          ; 7                    ; Signed Integer                                                                                                                                                                                                                              ;
; NUMWORDS_B                         ; 128                  ; Signed Integer                                                                                                                                                                                                                              ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                                                                                     ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                                                                                                                                                     ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                                                                                                                                                     ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                                                                                     ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                                                                                                                                                     ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                                                                                                                                                     ;
; CBXI_PARAMETER                     ; altsyncram_e502      ; Untyped                                                                                                                                                                                                                                     ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                         ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                                     ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                                     ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value                  ; Type                                                                                                                                                                                                               ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; sld_mfg_id              ; 70                     ; Signed Integer                                                                                                                                                                                                     ;
; sld_type_id             ; 34                     ; Signed Integer                                                                                                                                                                                                     ;
; sld_version             ; 3                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_instance_index      ; 1                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_auto_instance_index ; YES                    ; String                                                                                                                                                                                                             ;
; sld_ir_width            ; 2                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_sim_n_scan          ; 0                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_sim_action          ;                        ; String                                                                                                                                                                                                             ;
; sld_sim_total_length    ; 0                      ; Signed Integer                                                                                                                                                                                                     ;
; lpm_type                ; sld_virtual_jtag_basic ; String                                                                                                                                                                                                             ;
; lpm_hint                ; UNUSED                 ; String                                                                                                                                                                                                             ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value  ; Type                                                                                                          ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
; lpm_file       ; UNUSED ; String                                                                                                        ;
+----------------+--------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                  ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                        ;
; WIDTHAD_A                          ; 10                   ; Signed Integer                                                                                        ;
; NUMWORDS_A                         ; 1024                 ; Signed Integer                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                        ;
; WIDTHAD_B                          ; 10                   ; Signed Integer                                                                                        ;
; NUMWORDS_B                         ; 1024                 ; Signed Integer                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                               ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_qed1      ; Untyped                                                                                               ;
+------------------------------------+----------------------+-------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
; Parameter Name ; Value                  ; Type                                                                                        ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_two_ic_tag_ram.mif ; String                                                                                      ;
+----------------+------------------------+---------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                  ; Type                                                                                              ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                      ; Untyped                                                                                           ;
; AUTO_CARRY_CHAINS                  ; ON                     ; AUTO_CARRY                                                                                        ;
; IGNORE_CARRY_BUFFERS               ; OFF                    ; IGNORE_CARRY                                                                                      ;
; AUTO_CASCADE_CHAINS                ; ON                     ; AUTO_CASCADE                                                                                      ;
; IGNORE_CASCADE_BUFFERS             ; OFF                    ; IGNORE_CASCADE                                                                                    ;
; WIDTH_BYTEENA                      ; 1                      ; Untyped                                                                                           ;
; OPERATION_MODE                     ; DUAL_PORT              ; Untyped                                                                                           ;
; WIDTH_A                            ; 16                     ; Signed Integer                                                                                    ;
; WIDTHAD_A                          ; 7                      ; Signed Integer                                                                                    ;
; NUMWORDS_A                         ; 128                    ; Signed Integer                                                                                    ;
; OUTDATA_REG_A                      ; UNREGISTERED           ; Untyped                                                                                           ;
; ADDRESS_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; OUTDATA_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; WRCONTROL_ACLR_A                   ; NONE                   ; Untyped                                                                                           ;
; INDATA_ACLR_A                      ; NONE                   ; Untyped                                                                                           ;
; BYTEENA_ACLR_A                     ; NONE                   ; Untyped                                                                                           ;
; WIDTH_B                            ; 16                     ; Signed Integer                                                                                    ;
; WIDTHAD_B                          ; 7                      ; Signed Integer                                                                                    ;
; NUMWORDS_B                         ; 128                    ; Signed Integer                                                                                    ;
; INDATA_REG_B                       ; CLOCK1                 ; Untyped                                                                                           ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1                 ; Untyped                                                                                           ;
; RDCONTROL_REG_B                    ; CLOCK0                 ; Untyped                                                                                           ;
; ADDRESS_REG_B                      ; CLOCK0                 ; Untyped                                                                                           ;
; OUTDATA_REG_B                      ; UNREGISTERED           ; Untyped                                                                                           ;
; BYTEENA_REG_B                      ; CLOCK1                 ; Untyped                                                                                           ;
; INDATA_ACLR_B                      ; NONE                   ; Untyped                                                                                           ;
; WRCONTROL_ACLR_B                   ; NONE                   ; Untyped                                                                                           ;
; ADDRESS_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; OUTDATA_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; RDCONTROL_ACLR_B                   ; NONE                   ; Untyped                                                                                           ;
; BYTEENA_ACLR_B                     ; NONE                   ; Untyped                                                                                           ;
; WIDTH_BYTEENA_A                    ; 1                      ; Untyped                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                      ; Untyped                                                                                           ;
; RAM_BLOCK_TYPE                     ; AUTO                   ; Untyped                                                                                           ;
; BYTE_SIZE                          ; 8                      ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA               ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ   ; Untyped                                                                                           ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ   ; Untyped                                                                                           ;
; INIT_FILE                          ; cpu_two_ic_tag_ram.mif ; Untyped                                                                                           ;
; INIT_FILE_LAYOUT                   ; PORT_A                 ; Untyped                                                                                           ;
; MAXIMUM_DEPTH                      ; 0                      ; Signed Integer                                                                                    ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL                 ; Untyped                                                                                           ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN        ; Untyped                                                                                           ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN        ; Untyped                                                                                           ;
; ENABLE_ECC                         ; FALSE                  ; Untyped                                                                                           ;
; DEVICE_FAMILY                      ; Cyclone II             ; Untyped                                                                                           ;
; CBXI_PARAMETER                     ; altsyncram_veg1        ; Untyped                                                                                           ;
+------------------------------------+------------------------+---------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                ; Type                                                                                                            ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_two_rf_ram_a.mif ; String                                                                                                          ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; INIT_FILE                          ; cpu_two_rf_ram_a.mif ; Untyped                                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_s4g1      ; Untyped                                                                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                ; Type                                                                                                            ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_two_rf_ram_b.mif ; String                                                                                                          ;
+----------------+----------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                  ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                                                                                                               ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_A                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_A                         ; 32                   ; Signed Integer                                                                                                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_B                            ; 32                   ; Signed Integer                                                                                                        ;
; WIDTHAD_B                          ; 5                    ; Signed Integer                                                                                                        ;
; NUMWORDS_B                         ; 32                   ; Signed Integer                                                                                                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                               ;
; RDCONTROL_REG_B                    ; CLOCK0               ; Untyped                                                                                                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                                                                                                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                               ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                               ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                               ;
; INIT_FILE                          ; cpu_two_rf_ram_b.mif ; Untyped                                                                                                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                                                                                                        ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                               ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                               ;
; CBXI_PARAMETER                     ; altsyncram_t4g1      ; Untyped                                                                                                               ;
+------------------------------------+----------------------+-----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1 ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name                        ; Value             ; Type                                                                                                            ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS                     ; ON                ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS                  ; OFF               ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS                   ; ON                ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS                ; OFF               ; IGNORE_CASCADE                                                                                                  ;
; ACCUM_DIRECTION                       ; ADD               ; Untyped                                                                                                         ;
; ACCUM_SLOAD_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUM_SLOAD_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUMULATOR                           ; NO                ; Untyped                                                                                                         ;
; ADDER1_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDER3_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR1              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR3              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR1     ; ACLR0             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR3     ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER1          ; UNREGISTERED      ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER3          ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ADDER                        ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_REGISTER                     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUNDING                     ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_ACLR       ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_REGISTER   ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATION                   ; NO                ; Untyped                                                                                                         ;
; DEDICATED_MULTIPLIER_CIRCUITRY        ; YES               ; Untyped                                                                                                         ;
; DSP_BLOCK_BALANCING                   ; AUTO              ; Untyped                                                                                                         ;
; EXTRA_LATENCY                         ; 0                 ; Untyped                                                                                                         ;
; INPUT_ACLR_A0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_REGISTER_A0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_A1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_B1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_SOURCE_A0                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A1                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A2                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A3                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B0                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B1                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B2                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B3                       ; DATAB             ; Untyped                                                                                                         ;
; MULT01_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT01_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT01_SATURATION_ACLR                ; ACLR2             ; Untyped                                                                                                         ;
; MULT01_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_SATURATION_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER01_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER01_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER1_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER23_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER23_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER3_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR0                      ; ACLR0             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR1                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR2                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR3                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER0                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER1                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER2                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER3                  ; CLOCK0            ; Untyped                                                                                                         ;
; NUMBER_OF_MULTIPLIERS                 ; 1                 ; Signed Integer                                                                                                  ;
; OUTPUT_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_REGISTER                       ; UNREGISTERED      ; Untyped                                                                                                         ;
; OUTPUT_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_TYPE                     ; NEAREST_INTEGER   ; Untyped                                                                                                         ;
; OUTPUT_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_TYPE                  ; ASYMMETRIC        ; Untyped                                                                                                         ;
; OUTPUT_SATURATION                     ; NO                ; Untyped                                                                                                         ;
; port_addnsub1                         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_addnsub3                         ; PORT_CONNECTIVITY ; Untyped                                                                                                         ;
; PORT_CHAINOUT_SAT_IS_OVERFLOW         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; PORT_MULT0_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT1_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT2_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT3_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_OUTPUT_IS_OVERFLOW               ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signa                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signb                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; REPRESENTATION_A                      ; UNSIGNED          ; Untyped                                                                                                         ;
; REPRESENTATION_B                      ; UNSIGNED          ; Untyped                                                                                                         ;
; ROTATE_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_REGISTER                       ; CLOCK0            ; Untyped                                                                                                         ;
; WIDTH_MSB                             ; 17                ; Untyped                                                                                                         ;
; WIDTH_SATURATE_SIGN                   ; 1                 ; Untyped                                                                                                         ;
; SCANOUTA_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; SCANOUTA_REGISTER                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SHIFT_MODE                            ; NO                ; Untyped                                                                                                         ;
; SHIFT_RIGHT_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_ACLR               ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_REGISTER           ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_ACLR_A                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_ACLR_B                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_A                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_B                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_A            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_B            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_REGISTER_A                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SIGNED_REGISTER_B                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; WIDTH_A                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_B                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_CHAININ                         ; 1                 ; Untyped                                                                                                         ;
; WIDTH_RESULT                          ; 32                ; Signed Integer                                                                                                  ;
; ZERO_CHAINOUT_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_CHAINOUT_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_ACLR           ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_REGISTER       ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; CBXI_PARAMETER                        ; mult_add_4cr2     ; Untyped                                                                                                         ;
; DEVICE_FAMILY                         ; Cyclone II        ; Untyped                                                                                                         ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2 ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name                        ; Value             ; Type                                                                                                            ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS                     ; ON                ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS                  ; OFF               ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS                   ; ON                ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS                ; OFF               ; IGNORE_CASCADE                                                                                                  ;
; ACCUM_DIRECTION                       ; ADD               ; Untyped                                                                                                         ;
; ACCUM_SLOAD_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ACCUM_SLOAD_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUM_SLOAD_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; ACCUMULATOR                           ; NO                ; Untyped                                                                                                         ;
; ADDER1_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDER3_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB1_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB3_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR1              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_ACLR3              ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR1     ; ACLR0             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_ACLR3     ; ACLR3             ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER1 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_PIPELINE_REGISTER3 ; CLOCK0            ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER1          ; UNREGISTERED      ; Untyped                                                                                                         ;
; ADDNSUB_MULTIPLIER_REGISTER3          ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ADDER                        ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_REGISTER                     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_ACLR                   ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_OUTPUT_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_ACLR          ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_PIPELINE_REGISTER      ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUND_REGISTER               ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_ROUNDING                     ; NO                ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_OUTPUT_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_ACLR       ; ACLR3             ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_PIPELINE_REGISTER   ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATE_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; CHAINOUT_SATURATION                   ; NO                ; Untyped                                                                                                         ;
; DEDICATED_MULTIPLIER_CIRCUITRY        ; YES               ; Untyped                                                                                                         ;
; DSP_BLOCK_BALANCING                   ; AUTO              ; Untyped                                                                                                         ;
; EXTRA_LATENCY                         ; 0                 ; Untyped                                                                                                         ;
; INPUT_ACLR_A0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_A3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B0                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B1                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B2                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_ACLR_B3                         ; ACLR3             ; Untyped                                                                                                         ;
; INPUT_REGISTER_A0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_A1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_A3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B0                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; INPUT_REGISTER_B1                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B2                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_REGISTER_B3                     ; CLOCK0            ; Untyped                                                                                                         ;
; INPUT_SOURCE_A0                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A1                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A2                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_A3                       ; DATAA             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B0                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B1                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B2                       ; DATAB             ; Untyped                                                                                                         ;
; INPUT_SOURCE_B3                       ; DATAB             ; Untyped                                                                                                         ;
; MULT01_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT01_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT01_SATURATION_ACLR                ; ACLR2             ; Untyped                                                                                                         ;
; MULT01_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; MULT23_SATURATION_ACLR                ; ACLR3             ; Untyped                                                                                                         ;
; MULT23_SATURATION_REGISTER            ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER01_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER01_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER1_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER23_ROUNDING                 ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER23_SATURATION               ; NO                ; Untyped                                                                                                         ;
; MULTIPLIER3_DIRECTION                 ; ADD               ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR0                      ; ACLR0             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR1                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR2                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_ACLR3                      ; ACLR3             ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER0                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER1                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER2                  ; CLOCK0            ; Untyped                                                                                                         ;
; MULTIPLIER_REGISTER3                  ; CLOCK0            ; Untyped                                                                                                         ;
; NUMBER_OF_MULTIPLIERS                 ; 1                 ; Signed Integer                                                                                                  ;
; OUTPUT_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_REGISTER                       ; UNREGISTERED      ; Untyped                                                                                                         ;
; OUTPUT_ROUND_ACLR                     ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_ACLR            ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_ROUND_PIPELINE_REGISTER        ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_REGISTER                 ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_ROUND_TYPE                     ; NEAREST_INTEGER   ; Untyped                                                                                                         ;
; OUTPUT_ROUNDING                       ; NO                ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_ACLR         ; ACLR3             ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_PIPELINE_REGISTER     ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; OUTPUT_SATURATE_TYPE                  ; ASYMMETRIC        ; Untyped                                                                                                         ;
; OUTPUT_SATURATION                     ; NO                ; Untyped                                                                                                         ;
; port_addnsub1                         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_addnsub3                         ; PORT_CONNECTIVITY ; Untyped                                                                                                         ;
; PORT_CHAINOUT_SAT_IS_OVERFLOW         ; PORT_UNUSED       ; Untyped                                                                                                         ;
; PORT_MULT0_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT1_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT2_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_MULT3_IS_SATURATED               ; UNUSED            ; Untyped                                                                                                         ;
; PORT_OUTPUT_IS_OVERFLOW               ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signa                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; port_signb                            ; PORT_UNUSED       ; Untyped                                                                                                         ;
; REPRESENTATION_A                      ; UNSIGNED          ; Untyped                                                                                                         ;
; REPRESENTATION_B                      ; UNSIGNED          ; Untyped                                                                                                         ;
; ROTATE_ACLR                           ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_OUTPUT_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_ACLR                  ; ACLR3             ; Untyped                                                                                                         ;
; ROTATE_PIPELINE_REGISTER              ; CLOCK0            ; Untyped                                                                                                         ;
; ROTATE_REGISTER                       ; CLOCK0            ; Untyped                                                                                                         ;
; WIDTH_MSB                             ; 17                ; Untyped                                                                                                         ;
; WIDTH_SATURATE_SIGN                   ; 1                 ; Untyped                                                                                                         ;
; SCANOUTA_ACLR                         ; ACLR3             ; Untyped                                                                                                         ;
; SCANOUTA_REGISTER                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SHIFT_MODE                            ; NO                ; Untyped                                                                                                         ;
; SHIFT_RIGHT_ACLR                      ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_ACLR               ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_OUTPUT_REGISTER           ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; SHIFT_RIGHT_PIPELINE_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; SHIFT_RIGHT_REGISTER                  ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_ACLR_A                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_ACLR_B                         ; ACLR3             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_A                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_ACLR_B                ; ACLR0             ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_A            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_PIPELINE_REGISTER_B            ; CLOCK0            ; Untyped                                                                                                         ;
; SIGNED_REGISTER_A                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; SIGNED_REGISTER_B                     ; UNREGISTERED      ; Untyped                                                                                                         ;
; WIDTH_A                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_B                               ; 16                ; Signed Integer                                                                                                  ;
; WIDTH_CHAININ                         ; 1                 ; Untyped                                                                                                         ;
; WIDTH_RESULT                          ; 16                ; Signed Integer                                                                                                  ;
; ZERO_CHAINOUT_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_CHAINOUT_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_ACLR                    ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_ACLR             ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_OUTPUT_REGISTER         ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_ACLR           ; ACLR3             ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_PIPELINE_REGISTER       ; CLOCK0            ; Untyped                                                                                                         ;
; ZERO_LOOPBACK_REGISTER                ; CLOCK0            ; Untyped                                                                                                         ;
; CBXI_PARAMETER                        ; mult_add_6cr2     ; Untyped                                                                                                         ;
; DEVICE_FAMILY                         ; Cyclone II        ; Untyped                                                                                                         ;
+---------------------------------------+-------------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value                               ; Type                                                                                                                                                                                                               ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; cpu_two_ociram_default_contents.mif ; String                                                                                                                                                                                                             ;
+----------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                               ; Type                                                                                                                                                                                                                     ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                                   ; Untyped                                                                                                                                                                                                                  ;
; AUTO_CARRY_CHAINS                  ; ON                                  ; AUTO_CARRY                                                                                                                                                                                                               ;
; IGNORE_CARRY_BUFFERS               ; OFF                                 ; IGNORE_CARRY                                                                                                                                                                                                             ;
; AUTO_CASCADE_CHAINS                ; ON                                  ; AUTO_CASCADE                                                                                                                                                                                                             ;
; IGNORE_CASCADE_BUFFERS             ; OFF                                 ; IGNORE_CASCADE                                                                                                                                                                                                           ;
; WIDTH_BYTEENA                      ; 1                                   ; Untyped                                                                                                                                                                                                                  ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT                     ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_A                            ; 32                                  ; Signed Integer                                                                                                                                                                                                           ;
; WIDTHAD_A                          ; 8                                   ; Signed Integer                                                                                                                                                                                                           ;
; NUMWORDS_A                         ; 256                                 ; Signed Integer                                                                                                                                                                                                           ;
; OUTDATA_REG_A                      ; UNREGISTERED                        ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_ACLR_A                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; INDATA_ACLR_A                      ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_ACLR_A                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_B                            ; 32                                  ; Signed Integer                                                                                                                                                                                                           ;
; WIDTHAD_B                          ; 8                                   ; Signed Integer                                                                                                                                                                                                           ;
; NUMWORDS_B                         ; 256                                 ; Signed Integer                                                                                                                                                                                                           ;
; INDATA_REG_B                       ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; RDCONTROL_REG_B                    ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_REG_B                      ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_REG_B                      ; UNREGISTERED                        ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_REG_B                      ; CLOCK1                              ; Untyped                                                                                                                                                                                                                  ;
; INDATA_ACLR_B                      ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WRCONTROL_ACLR_B                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; ADDRESS_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; OUTDATA_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; RDCONTROL_ACLR_B                   ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; BYTEENA_ACLR_B                     ; NONE                                ; Untyped                                                                                                                                                                                                                  ;
; WIDTH_BYTEENA_A                    ; 4                                   ; Signed Integer                                                                                                                                                                                                           ;
; WIDTH_BYTEENA_B                    ; 1                                   ; Untyped                                                                                                                                                                                                                  ;
; RAM_BLOCK_TYPE                     ; AUTO                                ; Untyped                                                                                                                                                                                                                  ;
; BYTE_SIZE                          ; 8                                   ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                            ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ                ; Untyped                                                                                                                                                                                                                  ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ                ; Untyped                                                                                                                                                                                                                  ;
; INIT_FILE                          ; cpu_two_ociram_default_contents.mif ; Untyped                                                                                                                                                                                                                  ;
; INIT_FILE_LAYOUT                   ; PORT_A                              ; Untyped                                                                                                                                                                                                                  ;
; MAXIMUM_DEPTH                      ; 0                                   ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL                              ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN                     ; Untyped                                                                                                                                                                                                                  ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN                     ; Untyped                                                                                                                                                                                                                  ;
; ENABLE_ECC                         ; FALSE                               ; Untyped                                                                                                                                                                                                                  ;
; DEVICE_FAMILY                      ; Cyclone II                          ; Untyped                                                                                                                                                                                                                  ;
; CBXI_PARAMETER                     ; altsyncram_me72                     ; Untyped                                                                                                                                                                                                                  ;
+------------------------------------+-------------------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value  ; Type                                                                                                                                                                                                                                                ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; lpm_file       ; UNUSED ; String                                                                                                                                                                                                                                              ;
+----------------+--------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                                                                                                                                                                                        ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                                                                                                                                                                                     ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                                                                                                                                                                                  ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                                                                                                                                                                                ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                                                                                                                                                                                ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                                                                                                                                                                                              ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; OPERATION_MODE                     ; BIDIR_DUAL_PORT      ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_A                            ; 36                   ; Signed Integer                                                                                                                                                                                                                              ;
; WIDTHAD_A                          ; 7                    ; Signed Integer                                                                                                                                                                                                                              ;
; NUMWORDS_A                         ; 128                  ; Signed Integer                                                                                                                                                                                                                              ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_B                            ; 36                   ; Signed Integer                                                                                                                                                                                                                              ;
; WIDTHAD_B                          ; 7                    ; Signed Integer                                                                                                                                                                                                                              ;
; NUMWORDS_B                         ; 128                  ; Signed Integer                                                                                                                                                                                                                              ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                                                                                                                                                                                     ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_BYTEENA_A                    ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                                                                                                                                                                                     ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                                                                                                                                                                                     ;
; BYTE_SIZE                          ; 8                    ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA             ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                                                                                     ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                                                                                                                                                                                     ;
; INIT_FILE                          ; UNUSED               ; Untyped                                                                                                                                                                                                                                     ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                                                                                                                                                                                     ;
; MAXIMUM_DEPTH                      ; 0                    ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                                                                                     ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                                                                                                                                                                                     ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                                                                                                                                                                                     ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                                                                                                                                                                                     ;
; CBXI_PARAMETER                     ; altsyncram_e502      ; Untyped                                                                                                                                                                                                                                     ;
+------------------------------------+----------------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer1 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                         ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer2 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                                     ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk|altera_std_synchronizer:the_altera_std_synchronizer3 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                                                                                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; depth          ; 2     ; Signed Integer                                                                                                                                                                                                                                                                                                     ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value                  ; Type                                                                                                                                                                                                               ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; sld_mfg_id              ; 70                     ; Signed Integer                                                                                                                                                                                                     ;
; sld_type_id             ; 34                     ; Signed Integer                                                                                                                                                                                                     ;
; sld_version             ; 3                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_instance_index      ; 0                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_auto_instance_index ; YES                    ; String                                                                                                                                                                                                             ;
; sld_ir_width            ; 2                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_sim_n_scan          ; 0                      ; Signed Integer                                                                                                                                                                                                     ;
; sld_sim_action          ;                        ; String                                                                                                                                                                                                             ;
; sld_sim_total_length    ; 0                      ; Signed Integer                                                                                                                                                                                                     ;
; lpm_type                ; sld_virtual_jtag_basic ; String                                                                                                                                                                                                             ;
; lpm_hint                ; UNUSED                 ; String                                                                                                                                                                                                             ;
+-------------------------+------------------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; lpm_width               ; 8           ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 64          ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 6           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                             ;
; ALMOST_EMPTY_VALUE      ; 0           ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Cyclone II  ; Untyped                                                                                                                             ;
; OPTIMIZE_FOR_SPEED      ; 9           ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; scfifo_5n21 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; lpm_width               ; 8           ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 64          ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 6           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                             ;
; ALMOST_EMPTY_VALUE      ; 0           ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Cyclone II  ; Untyped                                                                                                                             ;
; OPTIMIZE_FOR_SPEED      ; 9           ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; scfifo_5n21 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value                            ; Type                                                                                              ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
; INSTANCE_ID             ; 1                                ; Signed Integer                                                                                    ;
; SLD_NODE_INFO           ; 00001100000000000110111000000001 ; Unsigned Binary                                                                                   ;
; SLD_AUTO_INSTANCE_INDEX ; YES                              ; String                                                                                            ;
; LOG2_TXFIFO_DEPTH       ; 6                                ; Signed Integer                                                                                    ;
; LOG2_RXFIFO_DEPTH       ; 6                                ; Signed Integer                                                                                    ;
; RESERVED                ; 0                                ; Signed Integer                                                                                    ;
; DATA_WIDTH              ; 8                                ; Signed Integer                                                                                    ;
; NODE_IR_WIDTH           ; 1                                ; Signed Integer                                                                                    ;
; SCAN_LENGTH             ; 11                               ; Signed Integer                                                                                    ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; lpm_width               ; 8           ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 64          ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 6           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                             ;
; ALMOST_EMPTY_VALUE      ; 0           ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Cyclone II  ; Untyped                                                                                                                             ;
; OPTIMIZE_FOR_SPEED      ; 9           ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; scfifo_5n21 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; lpm_width               ; 8           ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 64          ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 6           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                             ;
; ALMOST_EMPTY_VALUE      ; 0           ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Cyclone II  ; Untyped                                                                                                                             ;
; OPTIMIZE_FOR_SPEED      ; 9           ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; scfifo_5n21 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value                            ; Type                                                                                              ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
; INSTANCE_ID             ; 0                                ; Signed Integer                                                                                    ;
; SLD_NODE_INFO           ; 00001100000000000110111000000000 ; Unsigned Binary                                                                                   ;
; SLD_AUTO_INSTANCE_INDEX ; YES                              ; String                                                                                            ;
; LOG2_TXFIFO_DEPTH       ; 6                                ; Signed Integer                                                                                    ;
; LOG2_RXFIFO_DEPTH       ; 6                                ; Signed Integer                                                                                    ;
; RESERVED                ; 0                                ; Signed Integer                                                                                    ;
; DATA_WIDTH              ; 8                                ; Signed Integer                                                                                    ;
; NODE_IR_WIDTH           ; 1                                ; Signed Integer                                                                                    ;
; SCAN_LENGTH             ; 11                               ; Signed Integer                                                                                    ;
+-------------------------+----------------------------------+---------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                         ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                      ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                   ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                 ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                 ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                               ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                      ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                      ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                               ;
; WIDTHAD_A                          ; 10                   ; Signed Integer                                                               ;
; NUMWORDS_A                         ; 1024                 ; Signed Integer                                                               ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                      ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                      ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                      ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; WIDTH_B                            ; 1                    ; Untyped                                                                      ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                      ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                      ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                      ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                      ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                      ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                      ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                      ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                      ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                      ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                      ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                      ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; WIDTH_BYTEENA_A                    ; 4                    ; Signed Integer                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                      ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                      ;
; BYTE_SIZE                          ; 8                    ; Signed Integer                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                      ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                      ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                      ;
; INIT_FILE                          ; onchip_mem_one.hex   ; Untyped                                                                      ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                      ;
; MAXIMUM_DEPTH                      ; 1024                 ; Signed Integer                                                               ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                      ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                      ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                      ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                      ;
; CBXI_PARAMETER                     ; altsyncram_lvb1      ; Untyped                                                                      ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
; Parameter Name                     ; Value                ; Type                                                                         ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                                                                      ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                                                                   ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                                                                 ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                                                                 ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                                                               ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                                                                      ;
; OPERATION_MODE                     ; SINGLE_PORT          ; Untyped                                                                      ;
; WIDTH_A                            ; 32                   ; Signed Integer                                                               ;
; WIDTHAD_A                          ; 10                   ; Signed Integer                                                               ;
; NUMWORDS_A                         ; 1024                 ; Signed Integer                                                               ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                                                                      ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                                                                      ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                                                                      ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                                                                      ;
; WIDTH_B                            ; 1                    ; Untyped                                                                      ;
; WIDTHAD_B                          ; 1                    ; Untyped                                                                      ;
; NUMWORDS_B                         ; 1                    ; Untyped                                                                      ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                                                                      ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                                                                      ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                                                                      ;
; ADDRESS_REG_B                      ; CLOCK1               ; Untyped                                                                      ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                                                                      ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                                                                      ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                                                                      ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                      ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                                                                      ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                                                                      ;
; WIDTH_BYTEENA_A                    ; 4                    ; Signed Integer                                                               ;
; WIDTH_BYTEENA_B                    ; 1                    ; Untyped                                                                      ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                                                                      ;
; BYTE_SIZE                          ; 8                    ; Signed Integer                                                               ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                                                                      ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                      ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                                                                      ;
; INIT_FILE                          ; onchip_mem_two.hex   ; Untyped                                                                      ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                                                                      ;
; MAXIMUM_DEPTH                      ; 1024                 ; Signed Integer                                                               ;
; CLOCK_ENABLE_INPUT_A               ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_INPUT_B               ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_OUTPUT_B              ; NORMAL               ; Untyped                                                                      ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                                                                      ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                                                                      ;
; ENABLE_ECC                         ; FALSE                ; Untyped                                                                      ;
; DEVICE_FAMILY                      ; Cyclone II           ; Untyped                                                                      ;
; CBXI_PARAMETER                     ; altsyncram_d0c1      ; Untyped                                                                      ;
+------------------------------------+----------------------+------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------+
; Parameter Settings for User Entity Instance: arbiter:my_arbiter ;
+---------------------+-------+-----------------------------------+
; Parameter Name      ; Value ; Type                              ;
+---------------------+-------+-----------------------------------+
; s_WAIT_REQUEST      ; 000   ; Unsigned Binary                   ;
; s_ISSUE_ONE         ; 001   ; Unsigned Binary                   ;
; s_WAIT_DEASSERT_ONE ; 010   ; Unsigned Binary                   ;
; s_CYCLE_DELAY       ; 011   ; Unsigned Binary                   ;
; s_ISSUE_TWO         ; 100   ; Unsigned Binary                   ;
; s_WAIT_DEASSERT_TWO ; 101   ; Unsigned Binary                   ;
+---------------------+-------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: pzdyqx:nabboc     ;
+----------------+----------------------------------+----------------+
; Parameter Name ; Value                            ; Type           ;
+----------------+----------------------------------+----------------+
; pzdyqx0        ; 8                                ; Untyped        ;
; pzdyqx9        ; 1                                ; Signed Integer ;
; SLD_NODE_INFO  ; 552448                           ; Signed Integer ;
; pzdyqx5        ; 1                                ; Untyped        ;
; pzdyqx6        ; 01101010111101110000000010100010 ; Untyped        ;
; pzdyqx1        ; 3600                             ; Untyped        ;
; pzdyqx3        ; 12                               ; Untyped        ;
; pzdyqx2        ; 0                                ; Untyped        ;
; pzdyqx4        ; 1                                ; Untyped        ;
+----------------+----------------------------------+----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: sld_hub:sld_hub_inst                                                                                                                                         ;
+--------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
; Parameter Name           ; Value                                                                                                                                                            ; Type            ;
+--------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
; sld_hub_ip_version       ; 1                                                                                                                                                                ; Untyped         ;
; sld_hub_ip_minor_version ; 4                                                                                                                                                                ; Untyped         ;
; sld_common_ip_version    ; 0                                                                                                                                                                ; Untyped         ;
; device_family            ; Cyclone II                                                                                                                                                       ; Untyped         ;
; n_nodes                  ; 5                                                                                                                                                                ; Untyped         ;
; n_sel_bits               ; 3                                                                                                                                                                ; Untyped         ;
; n_node_ir_bits           ; 6                                                                                                                                                                ; Untyped         ;
; node_info                ; 0000000000001000011011100000000000001100000000000110111000000000000011000000000001101110000000010001100100010000010001100000000000011001000100000100011000000001 ; Unsigned Binary ;
; compilation_mode         ; 1                                                                                                                                                                ; Untyped         ;
; BROADCAST_FEATURE        ; 1                                                                                                                                                                ; Signed Integer  ;
; FORCE_IR_CAPTURE_FEATURE ; 1                                                                                                                                                                ; Signed Integer  ;
+--------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------+-----------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; altsyncram Parameter Settings by Entity Instance                                                                                                                                                                                                                                                       ;
+-------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Name                                      ; Value                                                                                                                                                                                                                                                      ;
+-------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances                ; 14                                                                                                                                                                                                                                                         ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram                                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                                                                                  ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram                                                                                                                                         ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 16                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 128                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 16                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 128                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram     ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 256                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 256                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 36                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 128                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 36                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 128                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data|altsyncram:the_altsyncram                                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                                                                                  ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram                                                                                                                                         ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 16                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 128                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 16                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 128                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram                                                                                                                       ;
;     -- OPERATION_MODE                     ; DUAL_PORT                                                                                                                                                                                                                                                  ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 32                                                                                                                                                                                                                                                         ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 32                                                                                                                                                                                                                                                         ;
;     -- ADDRESS_REG_B                      ; CLOCK0                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram     ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 256                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 256                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram ;
;     -- OPERATION_MODE                     ; BIDIR_DUAL_PORT                                                                                                                                                                                                                                            ;
;     -- WIDTH_A                            ; 36                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 128                                                                                                                                                                                                                                                        ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 36                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_B                         ; 128                                                                                                                                                                                                                                                        ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; OLD_DATA                                                                                                                                                                                                                                                   ;
; Entity Instance                           ; dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram                                                                                                                                                                ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                                                                                                                                                ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 1                                                                                                                                                                                                                                                          ;
;     -- NUMWORDS_B                         ; 1                                                                                                                                                                                                                                                          ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                                                                                  ;
; Entity Instance                           ; dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram                                                                                                                                                                ;
;     -- OPERATION_MODE                     ; SINGLE_PORT                                                                                                                                                                                                                                                ;
;     -- WIDTH_A                            ; 32                                                                                                                                                                                                                                                         ;
;     -- NUMWORDS_A                         ; 1024                                                                                                                                                                                                                                                       ;
;     -- OUTDATA_REG_A                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- WIDTH_B                            ; 1                                                                                                                                                                                                                                                          ;
;     -- NUMWORDS_B                         ; 1                                                                                                                                                                                                                                                          ;
;     -- ADDRESS_REG_B                      ; CLOCK1                                                                                                                                                                                                                                                     ;
;     -- OUTDATA_REG_B                      ; UNREGISTERED                                                                                                                                                                                                                                               ;
;     -- RAM_BLOCK_TYPE                     ; AUTO                                                                                                                                                                                                                                                       ;
;     -- READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE                                                                                                                                                                                                                                                  ;
+-------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; altmult_add Parameter Settings by Entity Instance                                                                                                                      ;
+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+
; Name                                  ; Value                                                                                                                          ;
+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances            ; 4                                                                                                                              ;
; Entity Instance                       ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; YES                                                                                                                            ;
;     -- NUMBER_OF_MULTIPLIERS          ; 1                                                                                                                              ;
;     -- port_signa                     ; PORT_UNUSED                                                                                                                    ;
;     -- port_signb                     ; PORT_UNUSED                                                                                                                    ;
;     -- REPRESENTATION_A               ; UNSIGNED                                                                                                                       ;
;     -- REPRESENTATION_B               ; UNSIGNED                                                                                                                       ;
;     -- WIDTH_A                        ; 16                                                                                                                             ;
;     -- WIDTH_B                        ; 16                                                                                                                             ;
;     -- WIDTH_RESULT                   ; 32                                                                                                                             ;
; Entity Instance                       ; dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; YES                                                                                                                            ;
;     -- NUMBER_OF_MULTIPLIERS          ; 1                                                                                                                              ;
;     -- port_signa                     ; PORT_UNUSED                                                                                                                    ;
;     -- port_signb                     ; PORT_UNUSED                                                                                                                    ;
;     -- REPRESENTATION_A               ; UNSIGNED                                                                                                                       ;
;     -- REPRESENTATION_B               ; UNSIGNED                                                                                                                       ;
;     -- WIDTH_A                        ; 16                                                                                                                             ;
;     -- WIDTH_B                        ; 16                                                                                                                             ;
;     -- WIDTH_RESULT                   ; 16                                                                                                                             ;
; Entity Instance                       ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_1 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; YES                                                                                                                            ;
;     -- NUMBER_OF_MULTIPLIERS          ; 1                                                                                                                              ;
;     -- port_signa                     ; PORT_UNUSED                                                                                                                    ;
;     -- port_signb                     ; PORT_UNUSED                                                                                                                    ;
;     -- REPRESENTATION_A               ; UNSIGNED                                                                                                                       ;
;     -- REPRESENTATION_B               ; UNSIGNED                                                                                                                       ;
;     -- WIDTH_A                        ; 16                                                                                                                             ;
;     -- WIDTH_B                        ; 16                                                                                                                             ;
;     -- WIDTH_RESULT                   ; 32                                                                                                                             ;
; Entity Instance                       ; dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell|altmult_add:the_altmult_add_part_2 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; YES                                                                                                                            ;
;     -- NUMBER_OF_MULTIPLIERS          ; 1                                                                                                                              ;
;     -- port_signa                     ; PORT_UNUSED                                                                                                                    ;
;     -- port_signb                     ; PORT_UNUSED                                                                                                                    ;
;     -- REPRESENTATION_A               ; UNSIGNED                                                                                                                       ;
;     -- REPRESENTATION_B               ; UNSIGNED                                                                                                                       ;
;     -- WIDTH_A                        ; 16                                                                                                                             ;
;     -- WIDTH_B                        ; 16                                                                                                                             ;
;     -- WIDTH_RESULT                   ; 16                                                                                                                             ;
+---------------------------------------+--------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------+
; scfifo Parameter Settings by Entity Instance                                                                                                                ;
+----------------------------+--------------------------------------------------------------------------------------------------------------------------------+
; Name                       ; Value                                                                                                                          ;
+----------------------------+--------------------------------------------------------------------------------------------------------------------------------+
; Number of entity instances ; 4                                                                                                                              ;
; Entity Instance            ; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo ;
;     -- FIFO Type           ; Single Clock                                                                                                                   ;
;     -- lpm_width           ; 8                                                                                                                              ;
;     -- LPM_NUMWORDS        ; 64                                                                                                                             ;
;     -- LPM_SHOWAHEAD       ; OFF                                                                                                                            ;
;     -- USE_EAB             ; ON                                                                                                                             ;
; Entity Instance            ; dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r|scfifo:rfifo ;
;     -- FIFO Type           ; Single Clock                                                                                                                   ;
;     -- lpm_width           ; 8                                                                                                                              ;
;     -- LPM_NUMWORDS        ; 64                                                                                                                             ;
;     -- LPM_SHOWAHEAD       ; OFF                                                                                                                            ;
;     -- USE_EAB             ; ON                                                                                                                             ;
; Entity Instance            ; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w|scfifo:wfifo ;
;     -- FIFO Type           ; Single Clock                                                                                                                   ;
;     -- lpm_width           ; 8                                                                                                                              ;
;     -- LPM_NUMWORDS        ; 64                                                                                                                             ;
;     -- LPM_SHOWAHEAD       ; OFF                                                                                                                            ;
;     -- USE_EAB             ; ON                                                                                                                             ;
; Entity Instance            ; dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r|scfifo:rfifo ;
;     -- FIFO Type           ; Single Clock                                                                                                                   ;
;     -- lpm_width           ; 8                                                                                                                              ;
;     -- LPM_NUMWORDS        ; 64                                                                                                                             ;
;     -- LPM_SHOWAHEAD       ; OFF                                                                                                                            ;
;     -- USE_EAB             ; ON                                                                                                                             ;
+----------------------------+--------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch" ;
+---------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------+
; Port    ; Type  ; Severity ; Details                                                                                                                         ;
+---------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------+
; data_in ; Input ; Info     ; Stuck at VCC                                                                                                                    ;
+---------+-------+----------+---------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic"                                     ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                                                                                      ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; raw_tck        ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tck            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tdi            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; rti            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; shift          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; update         ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; usr1           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; clrn           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; ena            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; ir_in          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tdo            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; irq            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; ir_out         ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; jtag_state_cdr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; jtag_state_sdr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; jtag_state_udr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_two_avalon_jtag_slave_arbitrator:the_jtag_uart_two_avalon_jtag_slave"                      ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                                                  ; Type   ; Severity ; Details                                                                             ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; jtag_uart_two_avalon_jtag_slave_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; jtag_uart_two_avalon_jtag_slave_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic"                                     ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                                                                                      ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+
; raw_tck        ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tck            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tdi            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; rti            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; shift          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; update         ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; usr1           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; clrn           ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; ena            ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; ir_in          ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; tdo            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; irq            ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; ir_out         ; Output ; Warning  ; Declared by entity but not connected by instance. Logic that only feeds a dangling port will be removed.                                     ;
; jtag_state_cdr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; jtag_state_sdr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
; jtag_state_udr ; Input  ; Warning  ; Declared by entity but not connected by instance. If a default value exists, it will be used.  Otherwise, the port will be connected to GND. ;
+----------------+--------+----------+----------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "dual_processor_system:my_system|jtag_uart_one_avalon_jtag_slave_arbitrator:the_jtag_uart_one_avalon_jtag_slave"                      ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                                                  ; Type   ; Severity ; Details                                                                             ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; jtag_uart_one_avalon_jtag_slave_dataavailable_from_sa ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; jtag_uart_one_avalon_jtag_slave_readyfordata_from_sa  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-------------------------------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 9.0 Build 235 06/17/2009 Service Pack 2 SJ Web Edition
    Info: Processing started: Mon Jul 20 18:37:15 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off chat_room -c chat_room
Info: Found 1 design units, including 1 entities, in source file sram.v
    Info: Found entity 1: sram
Info: Found 1 design units, including 1 entities, in source file bridge_one.v
    Info: Found entity 1: bridge_one
Info: Found 1 design units, including 1 entities, in source file bridge_two.v
    Info: Found entity 1: bridge_two
Info: Found 1 design units, including 1 entities, in source file chat_room.v
    Info: Found entity 1: chat_room
Info: Found 1 design units, including 1 entities, in source file arbiter.v
    Info: Found entity 1: arbiter
Warning (10236): Verilog HDL Implicit Net warning at chat_room.v(61): created implicit net for "ram_ack"
Info: Elaborating entity "chat_room" for the top level hierarchy
Warning: Using design file dual_processor_system.v, which is not specified as a design file for the current project, but contains definitions for 14 design units and 14 entities in project
    Info: Found entity 1: bridge_one_avalon_slave_arbitrator
    Info: Found entity 2: bridge_two_avalon_slave_arbitrator
    Info: Found entity 3: cpu_one_jtag_debug_module_arbitrator
    Info: Found entity 4: cpu_one_data_master_arbitrator
    Info: Found entity 5: cpu_one_instruction_master_arbitrator
    Info: Found entity 6: cpu_two_jtag_debug_module_arbitrator
    Info: Found entity 7: cpu_two_data_master_arbitrator
    Info: Found entity 8: cpu_two_instruction_master_arbitrator
    Info: Found entity 9: jtag_uart_one_avalon_jtag_slave_arbitrator
    Info: Found entity 10: jtag_uart_two_avalon_jtag_slave_arbitrator
    Info: Found entity 11: onchip_mem_one_s1_arbitrator
    Info: Found entity 12: onchip_mem_two_s1_arbitrator
    Info: Found entity 13: dual_processor_system_reset_clk_domain_synch_module
    Info: Found entity 14: dual_processor_system
Info: Elaborating entity "dual_processor_system" for hierarchy "dual_processor_system:my_system"
Info: Elaborating entity "bridge_one_avalon_slave_arbitrator" for hierarchy "dual_processor_system:my_system|bridge_one_avalon_slave_arbitrator:the_bridge_one_avalon_slave"
Info: Elaborating entity "bridge_one" for hierarchy "dual_processor_system:my_system|bridge_one:the_bridge_one"
Info: Elaborating entity "bridge_two_avalon_slave_arbitrator" for hierarchy "dual_processor_system:my_system|bridge_two_avalon_slave_arbitrator:the_bridge_two_avalon_slave"
Info: Elaborating entity "bridge_two" for hierarchy "dual_processor_system:my_system|bridge_two:the_bridge_two"
Info: Elaborating entity "cpu_one_jtag_debug_module_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_one_jtag_debug_module_arbitrator:the_cpu_one_jtag_debug_module"
Info: Elaborating entity "cpu_one_data_master_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_one_data_master_arbitrator:the_cpu_one_data_master"
Info: Elaborating entity "cpu_one_instruction_master_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_one_instruction_master_arbitrator:the_cpu_one_instruction_master"
Info: Found 24 design units, including 24 entities, in source file cpu_one.v
    Info: Found entity 1: cpu_one_ic_data_module
    Info: Found entity 2: cpu_one_ic_tag_module
    Info: Found entity 3: cpu_one_register_bank_a_module
    Info: Found entity 4: cpu_one_register_bank_b_module
    Info: Found entity 5: cpu_one_nios2_oci_debug
    Info: Found entity 6: cpu_one_ociram_lpm_dram_bdp_component_module
    Info: Found entity 7: cpu_one_nios2_ocimem
    Info: Found entity 8: cpu_one_nios2_avalon_reg
    Info: Found entity 9: cpu_one_nios2_oci_break
    Info: Found entity 10: cpu_one_nios2_oci_xbrk
    Info: Found entity 11: cpu_one_nios2_oci_dbrk
    Info: Found entity 12: cpu_one_nios2_oci_itrace
    Info: Found entity 13: cpu_one_nios2_oci_td_mode
    Info: Found entity 14: cpu_one_nios2_oci_dtrace
    Info: Found entity 15: cpu_one_nios2_oci_compute_tm_count
    Info: Found entity 16: cpu_one_nios2_oci_fifowp_inc
    Info: Found entity 17: cpu_one_nios2_oci_fifocount_inc
    Info: Found entity 18: cpu_one_nios2_oci_fifo
    Info: Found entity 19: cpu_one_nios2_oci_pib
    Info: Found entity 20: cpu_one_traceram_lpm_dram_bdp_component_module
    Info: Found entity 21: cpu_one_nios2_oci_im
    Info: Found entity 22: cpu_one_nios2_performance_monitors
    Info: Found entity 23: cpu_one_nios2_oci
    Info: Found entity 24: cpu_one
Info: Elaborating entity "cpu_one" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one"
Warning: Using design file cpu_one_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_test_bench
Info: Elaborating entity "cpu_one_test_bench" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_test_bench:the_cpu_one_test_bench"
Info: Elaborating entity "cpu_one_ic_data_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_qed1.tdf
    Info: Found entity 1: altsyncram_qed1
Info: Elaborating entity "altsyncram_qed1" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_data_module:cpu_one_ic_data|altsyncram:the_altsyncram|altsyncram_qed1:auto_generated"
Info: Elaborating entity "cpu_one_ic_tag_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_7eg1.tdf
    Info: Found entity 1: altsyncram_7eg1
Info: Elaborating entity "altsyncram_7eg1" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_ic_tag_module:cpu_one_ic_tag|altsyncram:the_altsyncram|altsyncram_7eg1:auto_generated"
Info: Elaborating entity "cpu_one_register_bank_a_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_44g1.tdf
    Info: Found entity 1: altsyncram_44g1
Info: Elaborating entity "altsyncram_44g1" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_a_module:cpu_one_register_bank_a|altsyncram:the_altsyncram|altsyncram_44g1:auto_generated"
Info: Elaborating entity "cpu_one_register_bank_b_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_54g1.tdf
    Info: Found entity 1: altsyncram_54g1
Info: Elaborating entity "altsyncram_54g1" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_register_bank_b_module:cpu_one_register_bank_b|altsyncram:the_altsyncram|altsyncram_54g1:auto_generated"
Warning: Using design file cpu_one_mult_cell.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_mult_cell
Info: Elaborating entity "cpu_one_mult_cell" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell"
Info: Elaborating entity "altmult_add" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1"
Info: Found 1 design units, including 1 entities, in source file db/mult_add_4cr2.tdf
    Info: Found entity 1: mult_add_4cr2
Info: Elaborating entity "mult_add_4cr2" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/ded_mult_2o81.tdf
    Info: Found entity 1: ded_mult_2o81
Info: Elaborating entity "ded_mult_2o81" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1"
Info: Found 1 design units, including 1 entities, in source file db/dffpipe_93c.tdf
    Info: Found entity 1: dffpipe_93c
Info: Elaborating entity "dffpipe_93c" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result"
Info: Elaborating entity "altmult_add" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2"
Info: Found 1 design units, including 1 entities, in source file db/mult_add_6cr2.tdf
    Info: Found entity 1: mult_add_6cr2
Info: Elaborating entity "mult_add_6cr2" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_mult_cell:the_cpu_one_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated"
Info: Elaborating entity "cpu_one_nios2_oci" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci"
Info: Elaborating entity "cpu_one_nios2_oci_debug" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_debug:the_cpu_one_nios2_oci_debug"
Info: Elaborating entity "cpu_one_nios2_ocimem" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem"
Info: Elaborating entity "cpu_one_ociram_lpm_dram_bdp_component_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_ud72.tdf
    Info: Found entity 1: altsyncram_ud72
Info: Elaborating entity "altsyncram_ud72" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_ocimem:the_cpu_one_nios2_ocimem|cpu_one_ociram_lpm_dram_bdp_component_module:cpu_one_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_ud72:auto_generated"
Info: Elaborating entity "cpu_one_nios2_avalon_reg" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_avalon_reg:the_cpu_one_nios2_avalon_reg"
Info: Elaborating entity "cpu_one_nios2_oci_break" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_break:the_cpu_one_nios2_oci_break"
Info: Elaborating entity "cpu_one_nios2_oci_xbrk" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_xbrk:the_cpu_one_nios2_oci_xbrk"
Info: Elaborating entity "cpu_one_nios2_oci_dbrk" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dbrk:the_cpu_one_nios2_oci_dbrk"
Info: Elaborating entity "cpu_one_nios2_oci_itrace" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace"
Info: Elaborating entity "cpu_one_nios2_oci_dtrace" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dtrace:the_cpu_one_nios2_oci_dtrace"
Info: Elaborating entity "cpu_one_nios2_oci_td_mode" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_dtrace:the_cpu_one_nios2_oci_dtrace|cpu_one_nios2_oci_td_mode:cpu_one_nios2_oci_trc_ctrl_td_mode"
Info: Elaborating entity "cpu_one_nios2_oci_fifo" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_fifo:the_cpu_one_nios2_oci_fifo"
Info: Elaborating entity "cpu_one_nios2_oci_compute_tm_count" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_fifo:the_cpu_one_nios2_oci_fifo|cpu_one_nios2_oci_compute_tm_count:cpu_one_nios2_oci_compute_tm_count_tm_count"
Info: Elaborating entity "cpu_one_nios2_oci_fifowp_inc" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_fifo:the_cpu_one_nios2_oci_fifo|cpu_one_nios2_oci_fifowp_inc:cpu_one_nios2_oci_fifowp_inc_fifowp"
Info: Elaborating entity "cpu_one_nios2_oci_fifocount_inc" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_fifo:the_cpu_one_nios2_oci_fifo|cpu_one_nios2_oci_fifocount_inc:cpu_one_nios2_oci_fifocount_inc_fifocount"
Warning: Using design file cpu_one_oci_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_oci_test_bench
Info: Elaborating entity "cpu_one_oci_test_bench" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_fifo:the_cpu_one_nios2_oci_fifo|cpu_one_oci_test_bench:the_cpu_one_oci_test_bench"
Info: Elaborating entity "cpu_one_nios2_oci_pib" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_pib:the_cpu_one_nios2_oci_pib"
Info: Elaborating entity "cpu_one_nios2_oci_im" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im"
Info: Elaborating entity "cpu_one_traceram_lpm_dram_bdp_component_module" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_e502.tdf
    Info: Found entity 1: altsyncram_e502
Info: Elaborating entity "altsyncram_e502" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated"
Warning: Using design file cpu_one_jtag_debug_module_wrapper.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_jtag_debug_module_wrapper
Info: Elaborating entity "cpu_one_jtag_debug_module_wrapper" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper"
Warning: Using design file cpu_one_jtag_debug_module_tck.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_jtag_debug_module_tck
Info: Elaborating entity "cpu_one_jtag_debug_module_tck" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck"
Info: Elaborating entity "altera_std_synchronizer" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_tck:the_cpu_one_jtag_debug_module_tck|altera_std_synchronizer:the_altera_std_synchronizer"
Warning: Using design file cpu_one_jtag_debug_module_sysclk.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_one_jtag_debug_module_sysclk
Info: Elaborating entity "cpu_one_jtag_debug_module_sysclk" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|cpu_one_jtag_debug_module_sysclk:the_cpu_one_jtag_debug_module_sysclk"
Info: Elaborating entity "sld_virtual_jtag_basic" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy"
Info: Elaborating entity "sld_virtual_jtag_impl" for hierarchy "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_jtag_debug_module_wrapper:the_cpu_one_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_one_jtag_debug_module_phy|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst"
Info: Elaborating entity "cpu_two_jtag_debug_module_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_two_jtag_debug_module_arbitrator:the_cpu_two_jtag_debug_module"
Info: Elaborating entity "cpu_two_data_master_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_two_data_master_arbitrator:the_cpu_two_data_master"
Info: Elaborating entity "cpu_two_instruction_master_arbitrator" for hierarchy "dual_processor_system:my_system|cpu_two_instruction_master_arbitrator:the_cpu_two_instruction_master"
Info: Found 24 design units, including 24 entities, in source file cpu_two.v
    Info: Found entity 1: cpu_two_ic_data_module
    Info: Found entity 2: cpu_two_ic_tag_module
    Info: Found entity 3: cpu_two_register_bank_a_module
    Info: Found entity 4: cpu_two_register_bank_b_module
    Info: Found entity 5: cpu_two_nios2_oci_debug
    Info: Found entity 6: cpu_two_ociram_lpm_dram_bdp_component_module
    Info: Found entity 7: cpu_two_nios2_ocimem
    Info: Found entity 8: cpu_two_nios2_avalon_reg
    Info: Found entity 9: cpu_two_nios2_oci_break
    Info: Found entity 10: cpu_two_nios2_oci_xbrk
    Info: Found entity 11: cpu_two_nios2_oci_dbrk
    Info: Found entity 12: cpu_two_nios2_oci_itrace
    Info: Found entity 13: cpu_two_nios2_oci_td_mode
    Info: Found entity 14: cpu_two_nios2_oci_dtrace
    Info: Found entity 15: cpu_two_nios2_oci_compute_tm_count
    Info: Found entity 16: cpu_two_nios2_oci_fifowp_inc
    Info: Found entity 17: cpu_two_nios2_oci_fifocount_inc
    Info: Found entity 18: cpu_two_nios2_oci_fifo
    Info: Found entity 19: cpu_two_nios2_oci_pib
    Info: Found entity 20: cpu_two_traceram_lpm_dram_bdp_component_module
    Info: Found entity 21: cpu_two_nios2_oci_im
    Info: Found entity 22: cpu_two_nios2_performance_monitors
    Info: Found entity 23: cpu_two_nios2_oci
    Info: Found entity 24: cpu_two
Info: Elaborating entity "cpu_two" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two"
Warning: Using design file cpu_two_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_test_bench
Info: Elaborating entity "cpu_two_test_bench" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_test_bench:the_cpu_two_test_bench"
Info: Elaborating entity "cpu_two_ic_data_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_data_module:cpu_two_ic_data"
Info: Elaborating entity "cpu_two_ic_tag_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_veg1.tdf
    Info: Found entity 1: altsyncram_veg1
Info: Elaborating entity "altsyncram_veg1" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_ic_tag_module:cpu_two_ic_tag|altsyncram:the_altsyncram|altsyncram_veg1:auto_generated"
Info: Elaborating entity "cpu_two_register_bank_a_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_s4g1.tdf
    Info: Found entity 1: altsyncram_s4g1
Info: Elaborating entity "altsyncram_s4g1" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_a_module:cpu_two_register_bank_a|altsyncram:the_altsyncram|altsyncram_s4g1:auto_generated"
Info: Elaborating entity "cpu_two_register_bank_b_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_t4g1.tdf
    Info: Found entity 1: altsyncram_t4g1
Info: Elaborating entity "altsyncram_t4g1" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_register_bank_b_module:cpu_two_register_bank_b|altsyncram:the_altsyncram|altsyncram_t4g1:auto_generated"
Warning: Using design file cpu_two_mult_cell.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_mult_cell
Info: Elaborating entity "cpu_two_mult_cell" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_mult_cell:the_cpu_two_mult_cell"
Info: Elaborating entity "cpu_two_nios2_oci" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci"
Info: Elaborating entity "cpu_two_nios2_oci_debug" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_debug:the_cpu_two_nios2_oci_debug"
Info: Elaborating entity "cpu_two_nios2_ocimem" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem"
Info: Elaborating entity "cpu_two_ociram_lpm_dram_bdp_component_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_me72.tdf
    Info: Found entity 1: altsyncram_me72
Info: Elaborating entity "altsyncram_me72" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_ocimem:the_cpu_two_nios2_ocimem|cpu_two_ociram_lpm_dram_bdp_component_module:cpu_two_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_me72:auto_generated"
Info: Elaborating entity "cpu_two_nios2_avalon_reg" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_avalon_reg:the_cpu_two_nios2_avalon_reg"
Info: Elaborating entity "cpu_two_nios2_oci_break" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_break:the_cpu_two_nios2_oci_break"
Info: Elaborating entity "cpu_two_nios2_oci_xbrk" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_xbrk:the_cpu_two_nios2_oci_xbrk"
Info: Elaborating entity "cpu_two_nios2_oci_dbrk" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dbrk:the_cpu_two_nios2_oci_dbrk"
Info: Elaborating entity "cpu_two_nios2_oci_itrace" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace"
Info: Elaborating entity "cpu_two_nios2_oci_dtrace" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dtrace:the_cpu_two_nios2_oci_dtrace"
Info: Elaborating entity "cpu_two_nios2_oci_td_mode" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_dtrace:the_cpu_two_nios2_oci_dtrace|cpu_two_nios2_oci_td_mode:cpu_two_nios2_oci_trc_ctrl_td_mode"
Info: Elaborating entity "cpu_two_nios2_oci_fifo" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_fifo:the_cpu_two_nios2_oci_fifo"
Info: Elaborating entity "cpu_two_nios2_oci_compute_tm_count" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_fifo:the_cpu_two_nios2_oci_fifo|cpu_two_nios2_oci_compute_tm_count:cpu_two_nios2_oci_compute_tm_count_tm_count"
Info: Elaborating entity "cpu_two_nios2_oci_fifowp_inc" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_fifo:the_cpu_two_nios2_oci_fifo|cpu_two_nios2_oci_fifowp_inc:cpu_two_nios2_oci_fifowp_inc_fifowp"
Info: Elaborating entity "cpu_two_nios2_oci_fifocount_inc" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_fifo:the_cpu_two_nios2_oci_fifo|cpu_two_nios2_oci_fifocount_inc:cpu_two_nios2_oci_fifocount_inc_fifocount"
Warning: Using design file cpu_two_oci_test_bench.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_oci_test_bench
Info: Elaborating entity "cpu_two_oci_test_bench" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_fifo:the_cpu_two_nios2_oci_fifo|cpu_two_oci_test_bench:the_cpu_two_oci_test_bench"
Info: Elaborating entity "cpu_two_nios2_oci_pib" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_pib:the_cpu_two_nios2_oci_pib"
Info: Elaborating entity "cpu_two_nios2_oci_im" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im"
Info: Elaborating entity "cpu_two_traceram_lpm_dram_bdp_component_module" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component"
Warning: Using design file cpu_two_jtag_debug_module_wrapper.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_jtag_debug_module_wrapper
Info: Elaborating entity "cpu_two_jtag_debug_module_wrapper" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper"
Warning: Using design file cpu_two_jtag_debug_module_tck.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_jtag_debug_module_tck
Info: Elaborating entity "cpu_two_jtag_debug_module_tck" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_tck:the_cpu_two_jtag_debug_module_tck"
Warning: Using design file cpu_two_jtag_debug_module_sysclk.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: cpu_two_jtag_debug_module_sysclk
Info: Elaborating entity "cpu_two_jtag_debug_module_sysclk" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|cpu_two_jtag_debug_module_sysclk:the_cpu_two_jtag_debug_module_sysclk"
Info: Elaborating entity "sld_virtual_jtag_basic" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy"
Info: Elaborating entity "sld_virtual_jtag_impl" for hierarchy "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_jtag_debug_module_wrapper:the_cpu_two_jtag_debug_module_wrapper|sld_virtual_jtag_basic:cpu_two_jtag_debug_module_phy|sld_virtual_jtag_impl:sld_virtual_jtag_impl_inst"
Info: Elaborating entity "jtag_uart_one_avalon_jtag_slave_arbitrator" for hierarchy "dual_processor_system:my_system|jtag_uart_one_avalon_jtag_slave_arbitrator:the_jtag_uart_one_avalon_jtag_slave"
Warning: Using design file jtag_uart_one.v, which is not specified as a design file for the current project, but contains definitions for 7 design units and 7 entities in project
    Info: Found entity 1: jtag_uart_one_log_module
    Info: Found entity 2: jtag_uart_one_sim_scfifo_w
    Info: Found entity 3: jtag_uart_one_scfifo_w
    Info: Found entity 4: jtag_uart_one_drom_module
    Info: Found entity 5: jtag_uart_one_sim_scfifo_r
    Info: Found entity 6: jtag_uart_one_scfifo_r
    Info: Found entity 7: jtag_uart_one
Info: Elaborating entity "jtag_uart_one" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one"
Info: Elaborating entity "jtag_uart_one_scfifo_w" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w"
Info: Elaborating entity "scfifo" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo"
Info: Elaborated megafunction instantiation "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo"
Info: Instantiated megafunction "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo" with the following parameter:
    Info: Parameter "lpm_hint" = "RAM_BLOCK_TYPE=AUTO"
    Info: Parameter "lpm_numwords" = "64"
    Info: Parameter "lpm_showahead" = "OFF"
    Info: Parameter "lpm_type" = "scfifo"
    Info: Parameter "lpm_width" = "8"
    Info: Parameter "lpm_widthu" = "6"
    Info: Parameter "overflow_checking" = "OFF"
    Info: Parameter "underflow_checking" = "OFF"
    Info: Parameter "use_eab" = "ON"
Info: Found 1 design units, including 1 entities, in source file db/scfifo_5n21.tdf
    Info: Found entity 1: scfifo_5n21
Info: Elaborating entity "scfifo_5n21" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/a_dpfifo_8t21.tdf
    Info: Found entity 1: a_dpfifo_8t21
Info: Elaborating entity "a_dpfifo_8t21" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo"
Info: Found 1 design units, including 1 entities, in source file db/a_fefifo_7cf.tdf
    Info: Found entity 1: a_fefifo_7cf
Info: Elaborating entity "a_fefifo_7cf" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state"
Info: Found 1 design units, including 1 entities, in source file db/cntr_rj7.tdf
    Info: Found entity 1: cntr_rj7
Info: Elaborating entity "cntr_rj7" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|a_fefifo_7cf:fifo_state|cntr_rj7:count_usedw"
Info: Found 1 design units, including 1 entities, in source file db/dpram_5h21.tdf
    Info: Found entity 1: dpram_5h21
Info: Elaborating entity "dpram_5h21" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_9tl1.tdf
    Info: Found entity 1: altsyncram_9tl1
Info: Elaborating entity "altsyncram_9tl1" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2"
Info: Found 1 design units, including 1 entities, in source file db/cntr_fjb.tdf
    Info: Found entity 1: cntr_fjb
Info: Elaborating entity "cntr_fjb" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_w:the_jtag_uart_one_scfifo_w|scfifo:wfifo|scfifo_5n21:auto_generated|a_dpfifo_8t21:dpfifo|cntr_fjb:rd_ptr_count"
Info: Elaborating entity "jtag_uart_one_scfifo_r" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|jtag_uart_one_scfifo_r:the_jtag_uart_one_scfifo_r"
Info: Elaborating entity "alt_jtag_atlantic" for hierarchy "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic"
Info: Elaborated megafunction instantiation "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic"
Info: Instantiated megafunction "dual_processor_system:my_system|jtag_uart_one:the_jtag_uart_one|alt_jtag_atlantic:jtag_uart_one_alt_jtag_atlantic" with the following parameter:
    Info: Parameter "INSTANCE_ID" = "1"
    Info: Parameter "LOG2_RXFIFO_DEPTH" = "6"
    Info: Parameter "LOG2_TXFIFO_DEPTH" = "6"
    Info: Parameter "SLD_AUTO_INSTANCE_INDEX" = "YES"
Info: Elaborating entity "jtag_uart_two_avalon_jtag_slave_arbitrator" for hierarchy "dual_processor_system:my_system|jtag_uart_two_avalon_jtag_slave_arbitrator:the_jtag_uart_two_avalon_jtag_slave"
Warning: Using design file jtag_uart_two.v, which is not specified as a design file for the current project, but contains definitions for 7 design units and 7 entities in project
    Info: Found entity 1: jtag_uart_two_log_module
    Info: Found entity 2: jtag_uart_two_sim_scfifo_w
    Info: Found entity 3: jtag_uart_two_scfifo_w
    Info: Found entity 4: jtag_uart_two_drom_module
    Info: Found entity 5: jtag_uart_two_sim_scfifo_r
    Info: Found entity 6: jtag_uart_two_scfifo_r
    Info: Found entity 7: jtag_uart_two
Info: Elaborating entity "jtag_uart_two" for hierarchy "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two"
Info: Elaborating entity "jtag_uart_two_scfifo_w" for hierarchy "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_w:the_jtag_uart_two_scfifo_w"
Info: Elaborating entity "jtag_uart_two_scfifo_r" for hierarchy "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|jtag_uart_two_scfifo_r:the_jtag_uart_two_scfifo_r"
Info: Elaborating entity "alt_jtag_atlantic" for hierarchy "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic"
Info: Elaborated megafunction instantiation "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic"
Info: Instantiated megafunction "dual_processor_system:my_system|jtag_uart_two:the_jtag_uart_two|alt_jtag_atlantic:jtag_uart_two_alt_jtag_atlantic" with the following parameter:
    Info: Parameter "INSTANCE_ID" = "0"
    Info: Parameter "LOG2_RXFIFO_DEPTH" = "6"
    Info: Parameter "LOG2_TXFIFO_DEPTH" = "6"
    Info: Parameter "SLD_AUTO_INSTANCE_INDEX" = "YES"
Info: Elaborating entity "onchip_mem_one_s1_arbitrator" for hierarchy "dual_processor_system:my_system|onchip_mem_one_s1_arbitrator:the_onchip_mem_one_s1"
Warning: Using design file onchip_mem_one.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: onchip_mem_one
Info: Elaborating entity "onchip_mem_one" for hierarchy "dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram"
Info: Instantiated megafunction "dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "byte_size" = "8"
    Info: Parameter "init_file" = "onchip_mem_one.hex"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "maximum_depth" = "1024"
    Info: Parameter "numwords_a" = "1024"
    Info: Parameter "operation_mode" = "SINGLE_PORT"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_byteena_a" = "4"
    Info: Parameter "widthad_a" = "10"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_lvb1.tdf
    Info: Found entity 1: altsyncram_lvb1
Info: Elaborating entity "altsyncram_lvb1" for hierarchy "dual_processor_system:my_system|onchip_mem_one:the_onchip_mem_one|altsyncram:the_altsyncram|altsyncram_lvb1:auto_generated"
Info: Elaborating entity "onchip_mem_two_s1_arbitrator" for hierarchy "dual_processor_system:my_system|onchip_mem_two_s1_arbitrator:the_onchip_mem_two_s1"
Warning: Using design file onchip_mem_two.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: onchip_mem_two
Info: Elaborating entity "onchip_mem_two" for hierarchy "dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two"
Info: Elaborating entity "altsyncram" for hierarchy "dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram"
Info: Elaborated megafunction instantiation "dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram"
Info: Instantiated megafunction "dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram" with the following parameter:
    Info: Parameter "byte_size" = "8"
    Info: Parameter "init_file" = "onchip_mem_two.hex"
    Info: Parameter "lpm_type" = "altsyncram"
    Info: Parameter "maximum_depth" = "1024"
    Info: Parameter "numwords_a" = "1024"
    Info: Parameter "operation_mode" = "SINGLE_PORT"
    Info: Parameter "outdata_reg_a" = "UNREGISTERED"
    Info: Parameter "ram_block_type" = "AUTO"
    Info: Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info: Parameter "width_a" = "32"
    Info: Parameter "width_byteena_a" = "4"
    Info: Parameter "widthad_a" = "10"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_d0c1.tdf
    Info: Found entity 1: altsyncram_d0c1
Info: Elaborating entity "altsyncram_d0c1" for hierarchy "dual_processor_system:my_system|onchip_mem_two:the_onchip_mem_two|altsyncram:the_altsyncram|altsyncram_d0c1:auto_generated"
Info: Elaborating entity "dual_processor_system_reset_clk_domain_synch_module" for hierarchy "dual_processor_system:my_system|dual_processor_system_reset_clk_domain_synch_module:dual_processor_system_reset_clk_domain_synch"
Info: Elaborating entity "arbiter" for hierarchy "arbiter:my_arbiter"
Info: Elaborating entity "sram" for hierarchy "sram:my_sram"
Warning: Synthesized away the following node(s):
    Warning: Synthesized away the following RAM node(s):
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[0]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[1]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[2]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[3]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[4]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[5]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[6]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[7]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[8]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[9]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[10]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[11]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[12]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[13]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[14]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[15]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[16]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[17]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[18]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[19]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[20]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[21]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[22]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[23]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[24]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[25]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[26]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[27]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[28]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[29]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[30]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[31]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[32]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[33]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[34]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|cpu_one_traceram_lpm_dram_bdp_component_module:cpu_one_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[35]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[0]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[1]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[2]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[3]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[4]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[5]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[6]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[7]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[8]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[9]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[10]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[11]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[12]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[13]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[14]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[15]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[16]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[17]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[18]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[19]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[20]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[21]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[22]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[23]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[24]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[25]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[26]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[27]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[28]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[29]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[30]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[31]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[32]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[33]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[34]"
        Warning (14320): Synthesized away node "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|cpu_two_traceram_lpm_dram_bdp_component_module:cpu_two_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated|q_a[35]"
Warning: OpenCore Plus Hardware Evaluation feature is turned on for the following cores
    Warning: "Nios II Processor (6AF7_00A2)" will use the OpenCore Plus Hardware Evaluation feature
Warning: Messages from megafunction that supports OpenCore Plus feature
    Warning: Messages from megafunction that supports OpenCore Plus feature Nios II Processor
        Warning: The reset input will be asserted when the evaluation time expires
        Warning: The reset input will be asserted when the evaluation time expires
Warning: Megafunction that supports OpenCore Plus feature will stop functioning in 1 hour after device is programmed
Info: Evaluation period of megafunction that supports OpenCore Plus feature can be extended indefinitely by using tethered operation
Warning: 2 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info: Registers with preset signals will power-up high
Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Info: 141 registers lost all their fanouts during netlist optimizations. The first 100 are displayed below.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[0]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[1]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[2]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[3]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[4]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[5]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[6]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[7]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[8]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[9]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[10]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[11]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[12]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[13]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[14]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[15]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[16]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[17]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[18]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[19]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[20]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[21]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[22]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[23]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[24]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[25]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[26]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[27]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[28]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[29]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[30]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[31]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[32]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[33]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[34]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_itrace:the_cpu_one_nios2_oci_itrace|itm[35]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[0]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[1]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[2]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[3]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[4]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[5]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[6]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[7]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[8]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[9]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[10]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[11]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[12]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[13]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[14]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[15]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[16]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[17]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[18]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[19]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[20]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[21]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[22]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[23]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[24]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[25]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[26]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[27]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[28]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[29]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[30]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[31]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[32]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[33]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[34]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_itrace:the_cpu_two_nios2_oci_itrace|itm[35]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[0]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[16]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[15]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[14]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[13]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[12]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[11]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[10]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[9]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[8]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[7]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[6]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[5]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[4]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[3]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[2]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_one:the_cpu_one|cpu_one_nios2_oci:the_cpu_one_nios2_oci|cpu_one_nios2_oci_im:the_cpu_one_nios2_oci_im|trc_jtag_addr[1]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[0]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[16]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[15]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[14]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[13]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[12]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[11]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[10]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[9]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[8]" lost all its fanouts during netlist optimizations.
    Info: Register "dual_processor_system:my_system|cpu_two:the_cpu_two|cpu_two_nios2_oci:the_cpu_two_nios2_oci|cpu_two_nios2_oci_im:the_cpu_two_nios2_oci_im|trc_jtag_addr[7]" lost all its fanouts during netlist optimizations.
    Info: List truncated at 100 items
Info: Registers with preset signals will power-up high
Info: DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Info: Generated suppressed messages file D:/Course/Computer Organization/chat_room/chat_room.map.smsg
Info: Implemented 6192 device resources after synthesis - the final resource count might be different
    Info: Implemented 5 input pins
    Info: Implemented 24 output pins
    Info: Implemented 16 bidirectional pins
    Info: Implemented 5754 logic cells
    Info: Implemented 384 RAM segments
    Info: Implemented 8 DSP elements
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 100 warnings
    Info: Peak virtual memory: 254 megabytes
    Info: Processing ended: Mon Jul 20 18:38:50 2009
    Info: Elapsed time: 00:01:35
    Info: Total CPU time (on all processors): 00:01:31


+------------------------------------------+
; Analysis & Synthesis Suppressed Messages ;
+------------------------------------------+
The suppressed messages can be found in D:/Course/Computer Organization/chat_room/chat_room.map.smsg.


